i965: Only emit VS state pipe control workaround on IVB and BYT.

According to the BSpec's 3D workarounds page, this is unnecessary on
shipping Haswell hardware, and was never necessary on Broadwell.  It
unfortunately doesn't say anything about Baytrail.

The workaround database confirms those results for Ivybridge, Haswell,
and Broadwell.  Baytrail is less clear - one page says it's necessary,
while the other says it isn't.  For now, be conservative and leave it
enabled.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c b/src/mesa/drivers/dri/i965/gen7_urb.c
index 5273699261616a2bd18b8730a458133538719147..2653e9cbeef4f8d9f2b96e89872da7e400447feb 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_urb.c
+++ b/src/mesa/drivers/dri/i965/gen7_urb.c
@@ -263,7 +263,8 @@ gen7_upload_urb(struct brw_context *brw)
    brw->urb.vs_start = push_constant_chunks;
    brw->urb.gs_start = push_constant_chunks + vs_chunks;
 
-   gen7_emit_vs_workaround_flush(brw);
+   if (brw->gen == 7 && !brw->is_haswell)
+      gen7_emit_vs_workaround_flush(brw);
    gen7_emit_urb_state(brw,
                        brw->urb.nr_vs_entries, vs_size, brw->urb.vs_start,
                        brw->urb.nr_gs_entries, gs_size, brw->urb.gs_start);

diff --git a/src/mesa/drivers/dri/i965/gen7_vs_state.c b/src/mesa/drivers/dri/i965/gen7_vs_state.c
index 8381e1fa3892cd44aeab3bd9f70c6b4172e94784..c4f1d264bff3090f8181c2dc10819ea6ba0384bf 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_vs_state.c
@@ -72,7 +72,8 @@ upload_vs_state(struct brw_context *brw)
    const int max_threads_shift = brw->is_haswell ?
       HSW_VS_MAX_THREADS_SHIFT : GEN6_VS_MAX_THREADS_SHIFT;
 
-   gen7_emit_vs_workaround_flush(brw);
+   if (!brw->is_haswell)
+      gen7_emit_vs_workaround_flush(brw);
 
    /* BRW_NEW_VS_BINDING_TABLE */
    BEGIN_BATCH(2);

diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index a06f298bafd8da3022615e76a6cbd879fe723031..98759e27e2de26cc2706914edc89fbdcb94c16f9 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -583,7 +583,7 @@ intel_emit_depth_stall_flushes(struct brw_context *brw)
 void
 gen7_emit_vs_workaround_flush(struct brw_context *brw)
 {
-   assert(brw->gen >= 7 && brw->gen <= 8);
+   assert(brw->gen == 7);
    brw_emit_pipe_control_write(brw,
                                PIPE_CONTROL_WRITE_IMMEDIATE
                                | PIPE_CONTROL_DEPTH_STALL,