split out instructions from openpower/isa/pifixedstore.mdwn

diff --git a/openpower/isa/pifixedstore.mdwn b/openpower/isa/pifixedstore.mdwn
index 1fe36aa6c65da2c00f271714b3473e73ad4b9bac..03dffdd4f083bfceb8774f777c6df8e6b29643c8 100644 (file)
--- a/openpower/isa/pifixedstore.mdwn
+++ b/openpower/isa/pifixedstore.mdwn
@@ -3,139 +3,18 @@
 <!-- This defines instructions that store from a register to RAM -->
 <!-- Effective Address is always RA, and the usual EA is stored late in RA -->
 
-# Store Byte with Update
+[[!inline pagenames="openpower/isa/pifixedstore/stbup" raw="yes"]]
 
-D-Form
+[[!inline pagenames="openpower/isa/pifixedstore/stbupx" raw="yes"]]
 
-* stbup RS,D(RA)
+[[!inline pagenames="openpower/isa/pifixedstore/sthup" raw="yes"]]
 
-Pseudo-code:
+[[!inline pagenames="openpower/isa/pifixedstore/sthupx" raw="yes"]]
 
-    EA <- (RA) + EXTS(D)
-    ea <- (RA)
-    MEM(ea, 1) <- (RS)[XLEN-8:XLEN-1]
-    RA <- EA
+[[!inline pagenames="openpower/isa/pifixedstore/stwup" raw="yes"]]
 
-Special Registers Altered:
+[[!inline pagenames="openpower/isa/pifixedstore/stwupx" raw="yes"]]
 
-    None
-
-# Store Byte with Update Indexed
-
-X-Form
-
-* stbupx RS,RA,RB
-
-Pseudo-code:
-
-    EA <- (RA) + (RB)
-    ea <- (RA)
-    MEM(ea, 1) <- (RS)[XLEN-8:XLEN-1]
-    RA <- EA
-
-Special Registers Altered:
-
-    None
-
-# Store Halfword with Update
-
-D-Form
-
-* sthup RS,D(RA)
-
-Pseudo-code:
-
-    EA <- (RA) + EXTS(D)
-    ea <- (RA)
-    MEM(ea, 2) <- (RS)[XLEN-16:XLEN-1]
-    RA <- EA
-
-Special Registers Altered:
-
-    None
-
-# Store Halfword with Update Indexed
-
-X-Form
-
-* sthupx RS,RA,RB
-
-Pseudo-code:
-
-    EA <- (RA) + (RB)
-    ea <- (RA)
-    MEM(ea, 2) <- (RS)[XLEN-16:XLEN-1]
-    RA <- EA
-
-Special Registers Altered:
-
-    None
-
-# Store Word with Update
-
-D-Form
-
-* stwup RS,D(RA)
-
-Pseudo-code:
-
-    EA <- (RA) + EXTS(D)
-    ea <- (RA)
-    MEM(ea, 4) <- (RS)[XLEN-32:XLEN-1]
-    RA <- EA
-
-Special Registers Altered:
-
-    None
-
-# Store Word with Update Indexed
-
-X-Form
-
-* stwupx RS,RA,RB
-
-Pseudo-code:
-
-    EA <- (RA) + (RB)
-    ea <- (RA)
-    MEM(ea, 4) <- (RS)[XLEN-32:XLEN-1]
-    RA <- EA
-
-Special Registers Altered:
-
-    None
-
-# Store Doubleword with Update
-
-DS-Form
-
-* stdup RS,DS(RA)
-
-Pseudo-code:
-
-    EA <- (RA) + EXTS(DS || 0b00)
-    ea <- (RA)
-    MEM(ea, 8) <- (RS)
-    RA <- EA
-
-Special Registers Altered:
-
-    None
-
-# Store Doubleword with Update Indexed
-
-X-Form
-
-* stdupx RS,RA,RB
-
-Pseudo-code:
-
-    EA <- (RA) + (RB)
-    ea <- (RA)
-    MEM(ea, 8) <- (RS)
-    RA <- EA
-
-Special Registers Altered:
-
-    None
+[[!inline pagenames="openpower/isa/pifixedstore/stdup" raw="yes"]]
 
+[[!inline pagenames="openpower/isa/pifixedstore/stdupx" raw="yes"]]

diff --git a/openpower/isa/pifixedstore/stbup.mdwn b/openpower/isa/pifixedstore/stbup.mdwn
new file mode 100644 (file)
index 0000000..34822f0
--- /dev/null
+++ b/openpower/isa/pifixedstore/stbup.mdwn
@@ -0,0 +1,13 @@
+# Store Byte with Update
+
+D-Form
+
+* stbup RS,D(RA)
+
+Pseudo-code:
+
+[[!inline pagenames="openpower/isa/pifixedstore/stbup_code" raw="yes"]]
+
+Special Registers Altered:
+
+    None

diff --git a/openpower/isa/pifixedstore/stbup_code.mdwn b/openpower/isa/pifixedstore/stbup_code.mdwn
new file mode 100644 (file)
index 0000000..2378d0f
--- /dev/null
+++ b/openpower/isa/pifixedstore/stbup_code.mdwn
@@ -0,0 +1,4 @@
+    EA <- (RA) + EXTS(D)
+    ea <- (RA)
+    MEM(ea, 1) <- (RS)[XLEN-8:XLEN-1]
+    RA <- EA

diff --git a/openpower/isa/pifixedstore/stbupx.mdwn b/openpower/isa/pifixedstore/stbupx.mdwn
new file mode 100644 (file)
index 0000000..790f706
--- /dev/null
+++ b/openpower/isa/pifixedstore/stbupx.mdwn
@@ -0,0 +1,13 @@
+# Store Byte with Update Indexed
+
+X-Form
+
+* stbupx RS,RA,RB
+
+Pseudo-code:
+
+[[!inline pagenames="openpower/isa/pifixedstore/stbupx_code" raw="yes"]]
+
+Special Registers Altered:
+
+    None

diff --git a/openpower/isa/pifixedstore/stbupx_code.mdwn b/openpower/isa/pifixedstore/stbupx_code.mdwn
new file mode 100644 (file)
index 0000000..6c57a67
--- /dev/null
+++ b/openpower/isa/pifixedstore/stbupx_code.mdwn
@@ -0,0 +1,4 @@
+    EA <- (RA) + (RB)
+    ea <- (RA)
+    MEM(ea, 1) <- (RS)[XLEN-8:XLEN-1]
+    RA <- EA

diff --git a/openpower/isa/pifixedstore/stdup.mdwn b/openpower/isa/pifixedstore/stdup.mdwn
new file mode 100644 (file)
index 0000000..e52bb8e
--- /dev/null
+++ b/openpower/isa/pifixedstore/stdup.mdwn
@@ -0,0 +1,13 @@
+# Store Doubleword with Update
+
+DS-Form
+
+* stdup RS,DS(RA)
+
+Pseudo-code:
+
+[[!inline pagenames="openpower/isa/pifixedstore/stdup_code" raw="yes"]]
+
+Special Registers Altered:
+
+    None

diff --git a/openpower/isa/pifixedstore/stdup_code.mdwn b/openpower/isa/pifixedstore/stdup_code.mdwn
new file mode 100644 (file)
index 0000000..8636c28
--- /dev/null
+++ b/openpower/isa/pifixedstore/stdup_code.mdwn
@@ -0,0 +1,4 @@
+    EA <- (RA) + EXTS(DS || 0b00)
+    ea <- (RA)
+    MEM(ea, 8) <- (RS)
+    RA <- EA

diff --git a/openpower/isa/pifixedstore/stdupx.mdwn b/openpower/isa/pifixedstore/stdupx.mdwn
new file mode 100644 (file)
index 0000000..f560908
--- /dev/null
+++ b/openpower/isa/pifixedstore/stdupx.mdwn
@@ -0,0 +1,14 @@
+# Store Doubleword with Update Indexed
+
+X-Form
+
+* stdupx RS,RA,RB
+
+Pseudo-code:
+
+[[!inline pagenames="openpower/isa/pifixedstore/stdupx_code" raw="yes"]]
+
+Special Registers Altered:
+
+    None
+

diff --git a/openpower/isa/pifixedstore/stdupx_code.mdwn b/openpower/isa/pifixedstore/stdupx_code.mdwn
new file mode 100644 (file)
index 0000000..69b2f90
--- /dev/null
+++ b/openpower/isa/pifixedstore/stdupx_code.mdwn
@@ -0,0 +1,4 @@
+    EA <- (RA) + (RB)
+    ea <- (RA)
+    MEM(ea, 8) <- (RS)
+    RA <- EA

diff --git a/openpower/isa/pifixedstore/sthup.mdwn b/openpower/isa/pifixedstore/sthup.mdwn
new file mode 100644 (file)
index 0000000..3eb92b1
--- /dev/null
+++ b/openpower/isa/pifixedstore/sthup.mdwn
@@ -0,0 +1,13 @@
+# Store Halfword with Update
+
+D-Form
+
+* sthup RS,D(RA)
+
+Pseudo-code:
+
+[[!inline pagenames="openpower/isa/pifixedstore/sthup_code" raw="yes"]]
+
+Special Registers Altered:
+
+    None

diff --git a/openpower/isa/pifixedstore/sthup_code.mdwn b/openpower/isa/pifixedstore/sthup_code.mdwn
new file mode 100644 (file)
index 0000000..2b2a898
--- /dev/null
+++ b/openpower/isa/pifixedstore/sthup_code.mdwn
@@ -0,0 +1,4 @@
+    EA <- (RA) + EXTS(D)
+    ea <- (RA)
+    MEM(ea, 2) <- (RS)[XLEN-16:XLEN-1]
+    RA <- EA

diff --git a/openpower/isa/pifixedstore/sthupx.mdwn b/openpower/isa/pifixedstore/sthupx.mdwn
new file mode 100644 (file)
index 0000000..59bb8f5
--- /dev/null
+++ b/openpower/isa/pifixedstore/sthupx.mdwn
@@ -0,0 +1,13 @@
+# Store Halfword with Update Indexed
+
+X-Form
+
+* sthupx RS,RA,RB
+
+Pseudo-code:
+
+[[!inline pagenames="openpower/isa/pifixedstore/sthupx_code" raw="yes"]]
+
+Special Registers Altered:
+
+    None

diff --git a/openpower/isa/pifixedstore/sthupx_code.mdwn b/openpower/isa/pifixedstore/sthupx_code.mdwn
new file mode 100644 (file)
index 0000000..af92658
--- /dev/null
+++ b/openpower/isa/pifixedstore/sthupx_code.mdwn
@@ -0,0 +1,4 @@
+    EA <- (RA) + (RB)
+    ea <- (RA)
+    MEM(ea, 2) <- (RS)[XLEN-16:XLEN-1]
+    RA <- EA

diff --git a/openpower/isa/pifixedstore/stwup.mdwn b/openpower/isa/pifixedstore/stwup.mdwn
new file mode 100644 (file)
index 0000000..84af1c7
--- /dev/null
+++ b/openpower/isa/pifixedstore/stwup.mdwn
@@ -0,0 +1,13 @@
+# Store Word with Update
+
+D-Form
+
+* stwup RS,D(RA)
+
+Pseudo-code:
+
+[[!inline pagenames="openpower/isa/pifixedstore/stwup_code" raw="yes"]]
+
+Special Registers Altered:
+
+    None

diff --git a/openpower/isa/pifixedstore/stwup_code.mdwn b/openpower/isa/pifixedstore/stwup_code.mdwn
new file mode 100644 (file)
index 0000000..c028760
--- /dev/null
+++ b/openpower/isa/pifixedstore/stwup_code.mdwn
@@ -0,0 +1,4 @@
+    EA <- (RA) + EXTS(D)
+    ea <- (RA)
+    MEM(ea, 4) <- (RS)[XLEN-32:XLEN-1]
+    RA <- EA

diff --git a/openpower/isa/pifixedstore/stwupx.mdwn b/openpower/isa/pifixedstore/stwupx.mdwn
new file mode 100644 (file)
index 0000000..4398003
--- /dev/null
+++ b/openpower/isa/pifixedstore/stwupx.mdwn
@@ -0,0 +1,13 @@
+# Store Word with Update Indexed
+
+X-Form
+
+* stwupx RS,RA,RB
+
+Pseudo-code:
+
+[[!inline pagenames="openpower/isa/pifixedstore/stwupx_code" raw="yes"]]
+
+Special Registers Altered:
+
+    None

diff --git a/openpower/isa/pifixedstore/stwupx_code.mdwn b/openpower/isa/pifixedstore/stwupx_code.mdwn
new file mode 100644 (file)
index 0000000..10e210f
--- /dev/null
+++ b/openpower/isa/pifixedstore/stwupx_code.mdwn
@@ -0,0 +1,4 @@
+    EA <- (RA) + (RB)
+    ea <- (RA)
+    MEM(ea, 4) <- (RS)[XLEN-32:XLEN-1]
+    RA <- EA