if (wen) mem[addr] <= wdata;
rdata <= mem[addr];
end
-endmodule
\ No newline at end of file
+endmodule
read -sv typedef_memory.sv
prep -top top
-select -assert-count 1 t:$mem r:SIZE=16 %i r:WIDTH=4 %i
\ No newline at end of file
+select -assert-count 1 t:$mem r:SIZE=16 %i r:WIDTH=4 %i
if (wen) mem[addr] <= wdata;
rdata <= mem[addr];
end
-endmodule
\ No newline at end of file
+endmodule
read -sv typedef_memory_2.sv
prep -top top
dump
-select -assert-count 1 t:$mem r:SIZE=16 %i r:WIDTH=4 %i
\ No newline at end of file
+select -assert-count 1 t:$mem r:SIZE=16 %i r:WIDTH=4 %i
always @* assert(a == 8'hAA);
-endmodule
\ No newline at end of file
+endmodule
`STATIC_ASSERT(int8 == 8'b11111111);
`STATIC_ASSERT(ch == 8'b11111111);
-endmodule
\ No newline at end of file
+endmodule
--- /dev/null
+
+typedef logic [3:0] outer_uint4_t;
+
+module top;
+
+ outer_uint4_t u4_i = 8'hA5;
+ always @(*) assert(u4_i == 4'h5);
+
+ typedef logic [3:0] inner_type;
+ inner_type inner_i1 = 8'h5A;
+ always @(*) assert(inner_i1 == 4'hA);
+
+ if (1) begin: genblock
+ typedef logic [7:0] inner_type;
+ inner_type inner_gb_i = 8'hA5;
+ always @(*) assert(inner_gb_i == 8'hA5);
+ end
+
+ inner_type inner_i2 = 8'h42;
+ always @(*) assert(inner_i2 == 4'h2);
+
+
+endmodule
always @* assert(int8 == 8'b11111111);
always @* assert(ch == 8'b11111111);
-endmodule
\ No newline at end of file
+endmodule