2008-04-23 H.J. Lu <hongjiu.lu@intel.com>
authorH.J. Lu <hjl.tools@gmail.com>
Wed, 23 Apr 2008 16:01:10 +0000 (16:01 +0000)
committerH.J. Lu <hjl.tools@gmail.com>
Wed, 23 Apr 2008 16:01:10 +0000 (16:01 +0000)
* gas/i386/i386.exp: Run sse-noavx and x86-64-sse-noavx.

* gas/i386/sse-noavx.d: New.
* gas/i386/sse-noavx.s: Likewise.
* gas/i386/x86-64-sse-noavx.d: Likewise.
* gas/i386/x86-64-sse-noavx.s: Likewise.

gas/testsuite/ChangeLog
gas/testsuite/gas/i386/i386.exp
gas/testsuite/gas/i386/sse-noavx.d [new file with mode: 0644]
gas/testsuite/gas/i386/sse-noavx.s [new file with mode: 0644]
gas/testsuite/gas/i386/x86-64-sse-noavx.d [new file with mode: 0644]
gas/testsuite/gas/i386/x86-64-sse-noavx.s [new file with mode: 0644]

index 871508e580b491e1871ee5dcac9ceb249cdda1b0..c1f520d46102d7c6a53f59239e0037f8a25b3327 100644 (file)
@@ -1,3 +1,12 @@
+2008-04-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * gas/i386/i386.exp: Run sse-noavx and x86-64-sse-noavx.
+
+       * gas/i386/sse-noavx.d: New.
+       * gas/i386/sse-noavx.s: Likewise.
+       * gas/i386/x86-64-sse-noavx.d: Likewise.
+       * gas/i386/x86-64-sse-noavx.s: Likewise.
+
 2008-04-23  H.J. Lu  <hongjiu.lu@intel.com>
 
        * gas/i386/sse2.s: Add tests for pmuludq, paddq and psubq.
index 18d6a7d123a405288a46e4bc592ce45492a2f47e..f1e9779d13e4920d4dbc19a96a5796597d3e11ce 100644 (file)
@@ -127,6 +127,7 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "sse-check"
     run_dump_test "sse-check-warn"
     run_list_test "sse-check-error" "-msse-check=error -I${srcdir}/$subdir -al"
+    run_dump_test "sse-noavx"
 
     # These tests require support for 8 and 16 bit relocs,
     # so we only run them for ELF and COFF targets.
@@ -256,6 +257,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-sse-check"
     run_dump_test "x86-64-sse-check-warn"
     run_list_test "x86-64-sse-check-error" "-msse-check=error -I${srcdir}/$subdir -al"
+    run_dump_test "x86-64-sse-noavx"
 
     if { ![istarget "*-*-aix*"]
       && ![istarget "*-*-beos*"]
diff --git a/gas/testsuite/gas/i386/sse-noavx.d b/gas/testsuite/gas/i386/sse-noavx.d
new file mode 100644 (file)
index 0000000..f37f285
--- /dev/null
@@ -0,0 +1,57 @@
+#as: -msse-check=error
+#objdump: -dw
+#name: i386 SSE without AVX equivalent
+
+.*:     file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[      ]*[a-f0-9]+:    f2 0f 38 f0 d9          crc32b %cl,%ebx
+[      ]*[a-f0-9]+:    0f 2a d3                cvtpi2ps %mm3,%xmm2
+[      ]*[a-f0-9]+:    0f 2d f7                cvtps2pi %xmm7,%mm6
+[      ]*[a-f0-9]+:    0f 2c dc                cvttps2pi %xmm4,%mm3
+[      ]*[a-f0-9]+:    df 08                   fisttp \(%eax\)
+[      ]*[a-f0-9]+:    dd 08                   fisttpll \(%eax\)
+[      ]*[a-f0-9]+:    0f f7 c7                maskmovq %mm7,%mm0
+[      ]*[a-f0-9]+:    0f 01 c8                monitor %eax,%ecx,%edx
+[      ]*[a-f0-9]+:    0f e7 10                movntq %mm2,\(%eax\)
+[      ]*[a-f0-9]+:    0f 01 c9                mwait  %eax,%ecx
+[      ]*[a-f0-9]+:    0f 38 1c c1             pabsb  %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 38 1e c1             pabsd  %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 38 1d c1             pabsw  %mm1,%mm0
+[      ]*[a-f0-9]+:    0f d4 c1                paddq  %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 3a 0f c1 02          palignr \$0x2,%mm1,%mm0
+[      ]*[a-f0-9]+:    0f e0 c1                pavgb  %mm1,%mm0
+[      ]*[a-f0-9]+:    0f e3 d3                pavgw  %mm3,%mm2
+[      ]*[a-f0-9]+:    0f c5 c1 00             pextrw \$0x0,%mm1,%eax
+[      ]*[a-f0-9]+:    0f 38 02 c1             phaddd %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 38 03 c1             phaddsw %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 38 01 c1             phaddw %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 38 06 c1             phsubd %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 38 07 c1             phsubsw %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 38 05 c1             phsubw %mm1,%mm0
+[      ]*[a-f0-9]+:    0f c4 d2 02             pinsrw \$0x2,%edx,%mm2
+[      ]*[a-f0-9]+:    0f 38 04 c1             pmaddubsw %mm1,%mm0
+[      ]*[a-f0-9]+:    0f ee c1                pmaxsw %mm1,%mm0
+[      ]*[a-f0-9]+:    0f de d2                pmaxub %mm2,%mm2
+[      ]*[a-f0-9]+:    0f ea e5                pminsw %mm5,%mm4
+[      ]*[a-f0-9]+:    0f da f7                pminub %mm7,%mm6
+[      ]*[a-f0-9]+:    0f d7 c5                pmovmskb %mm5,%eax
+[      ]*[a-f0-9]+:    0f 38 0b c1             pmulhrsw %mm1,%mm0
+[      ]*[a-f0-9]+:    0f e4 e5                pmulhuw %mm5,%mm4
+[      ]*[a-f0-9]+:    0f f4 c8                pmuludq %mm0,%mm1
+[      ]*[a-f0-9]+:    f3 0f b8 cb             popcnt %ebx,%ecx
+[      ]*[a-f0-9]+:    0f 18 00                prefetchnta \(%eax\)
+[      ]*[a-f0-9]+:    0f 18 08                prefetcht0 \(%eax\)
+[      ]*[a-f0-9]+:    0f 18 10                prefetcht1 \(%eax\)
+[      ]*[a-f0-9]+:    0f 18 18                prefetcht2 \(%eax\)
+[      ]*[a-f0-9]+:    0f f6 f7                psadbw %mm7,%mm6
+[      ]*[a-f0-9]+:    0f 38 00 c1             pshufb %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 70 da 01             pshufw \$0x1,%mm2,%mm3
+[      ]*[a-f0-9]+:    0f 38 08 c1             psignb %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 38 0a c1             psignd %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 38 09 c1             psignw %mm1,%mm0
+[      ]*[a-f0-9]+:    0f fb c1                psubq  %mm1,%mm0
+[      ]*[a-f0-9]+:    0f ae f8                sfence 
+#pass
diff --git a/gas/testsuite/gas/i386/sse-noavx.s b/gas/testsuite/gas/i386/sse-noavx.s
new file mode 100644 (file)
index 0000000..add51a0
--- /dev/null
@@ -0,0 +1,51 @@
+# Check SSE instructions without AVX equivalent
+
+       .text
+_start:
+ crc32           %cl,%ebx
+ cvtpi2ps      %mm3,%xmm2
+ cvtps2pi      %xmm7,%mm6
+ cvttps2pi     %xmm4,%mm3
+ fisttp (%eax)
+ fisttpll (%eax)
+ maskmovq      %mm7,%mm0
+ monitor
+ movntq                %mm2,(%eax)
+ mwait
+ pabsb           %mm1,%mm0
+ pabsd           %mm1,%mm0
+ pabsw           %mm1,%mm0
+ paddq           %mm1,%mm0
+ palignr         $0x2,%mm1,%mm0
+ pavgb         %mm1,%mm0
+ pavgw         %mm3,%mm2
+ pextrw                $0x0,%mm1,%eax
+ phaddd          %mm1,%mm0
+ phaddsw         %mm1,%mm0
+ phaddw          %mm1,%mm0
+ phsubd          %mm1,%mm0
+ phsubsw         %mm1,%mm0
+ phsubw          %mm1,%mm0
+ pinsrw                $0x2,%edx,%mm2
+ pmaddubsw       %mm1,%mm0
+ pmaxsw                %mm1,%mm0
+ pmaxub                %mm2,%mm2
+ pminsw                %mm5,%mm4
+ pminub                %mm7,%mm6
+ pmovmskb      %mm5,%eax
+ pmulhrsw        %mm1,%mm0
+ pmulhuw       %mm5,%mm4
+ pmuludq         %mm0, %mm1
+ popcnt %ebx,%ecx
+ prefetchnta   (%eax)
+ prefetcht0    (%eax)
+ prefetcht1    (%eax)
+ prefetcht2    (%eax)
+ psadbw                %mm7,%mm6
+ pshufb         %mm1,%mm0
+ pshufw                $0x1,%mm2,%mm3
+ psignb          %mm1,%mm0
+ psignd          %mm1,%mm0
+ psignw          %mm1,%mm0
+ psubq %mm1,%mm0
+ sfence
diff --git a/gas/testsuite/gas/i386/x86-64-sse-noavx.d b/gas/testsuite/gas/i386/x86-64-sse-noavx.d
new file mode 100644 (file)
index 0000000..c597a1d
--- /dev/null
@@ -0,0 +1,58 @@
+#as: -msse-check=error
+#objdump: -dw
+#name: x86-64 SSE without AVX equivalent
+
+.*:     file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[      ]*[a-f0-9]+:    48 0f c7 08             cmpxchg16b \(%rax\)
+[      ]*[a-f0-9]+:    f2 0f 38 f0 d9          crc32b %cl,%ebx
+[      ]*[a-f0-9]+:    0f 2a d3                cvtpi2ps %mm3,%xmm2
+[      ]*[a-f0-9]+:    0f 2d f7                cvtps2pi %xmm7,%mm6
+[      ]*[a-f0-9]+:    0f 2c dc                cvttps2pi %xmm4,%mm3
+[      ]*[a-f0-9]+:    df 08                   fisttp \(%rax\)
+[      ]*[a-f0-9]+:    dd 08                   fisttpll \(%rax\)
+[      ]*[a-f0-9]+:    0f f7 c7                maskmovq %mm7,%mm0
+[      ]*[a-f0-9]+:    0f 01 c8                monitor %rax,%rcx,%rdx
+[      ]*[a-f0-9]+:    0f e7 10                movntq %mm2,\(%rax\)
+[      ]*[a-f0-9]+:    0f 01 c9                mwait  %rax,%rcx
+[      ]*[a-f0-9]+:    0f 38 1c c1             pabsb  %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 38 1e c1             pabsd  %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 38 1d c1             pabsw  %mm1,%mm0
+[      ]*[a-f0-9]+:    0f d4 c1                paddq  %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 3a 0f c1 02          palignr \$0x2,%mm1,%mm0
+[      ]*[a-f0-9]+:    0f e0 c1                pavgb  %mm1,%mm0
+[      ]*[a-f0-9]+:    0f e3 d3                pavgw  %mm3,%mm2
+[      ]*[a-f0-9]+:    0f c5 c1 00             pextrw \$0x0,%mm1,%eax
+[      ]*[a-f0-9]+:    0f 38 02 c1             phaddd %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 38 03 c1             phaddsw %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 38 01 c1             phaddw %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 38 06 c1             phsubd %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 38 07 c1             phsubsw %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 38 05 c1             phsubw %mm1,%mm0
+[      ]*[a-f0-9]+:    0f c4 d2 02             pinsrw \$0x2,%edx,%mm2
+[      ]*[a-f0-9]+:    0f 38 04 c1             pmaddubsw %mm1,%mm0
+[      ]*[a-f0-9]+:    0f ee c1                pmaxsw %mm1,%mm0
+[      ]*[a-f0-9]+:    0f de d2                pmaxub %mm2,%mm2
+[      ]*[a-f0-9]+:    0f ea e5                pminsw %mm5,%mm4
+[      ]*[a-f0-9]+:    0f da f7                pminub %mm7,%mm6
+[      ]*[a-f0-9]+:    0f d7 c5                pmovmskb %mm5,%eax
+[      ]*[a-f0-9]+:    0f 38 0b c1             pmulhrsw %mm1,%mm0
+[      ]*[a-f0-9]+:    0f e4 e5                pmulhuw %mm5,%mm4
+[      ]*[a-f0-9]+:    0f f4 c8                pmuludq %mm0,%mm1
+[      ]*[a-f0-9]+:    f3 0f b8 cb             popcnt %ebx,%ecx
+[      ]*[a-f0-9]+:    0f 18 00                prefetchnta \(%rax\)
+[      ]*[a-f0-9]+:    0f 18 08                prefetcht0 \(%rax\)
+[      ]*[a-f0-9]+:    0f 18 10                prefetcht1 \(%rax\)
+[      ]*[a-f0-9]+:    0f 18 18                prefetcht2 \(%rax\)
+[      ]*[a-f0-9]+:    0f f6 f7                psadbw %mm7,%mm6
+[      ]*[a-f0-9]+:    0f 38 00 c1             pshufb %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 70 da 01             pshufw \$0x1,%mm2,%mm3
+[      ]*[a-f0-9]+:    0f 38 08 c1             psignb %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 38 0a c1             psignd %mm1,%mm0
+[      ]*[a-f0-9]+:    0f 38 09 c1             psignw %mm1,%mm0
+[      ]*[a-f0-9]+:    0f fb c1                psubq  %mm1,%mm0
+[      ]*[a-f0-9]+:    0f ae f8                sfence 
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-sse-noavx.s b/gas/testsuite/gas/i386/x86-64-sse-noavx.s
new file mode 100644 (file)
index 0000000..05ce292
--- /dev/null
@@ -0,0 +1,52 @@
+# Check 64bit SSE instructions without AVX equivalent
+
+       .text
+_start:
+ cmpxchg16b (%rax)
+ crc32           %cl,%ebx
+ cvtpi2ps      %mm3,%xmm2
+ cvtps2pi      %xmm7,%mm6
+ cvttps2pi     %xmm4,%mm3
+ fisttp (%rax)
+ fisttpll (%rax)
+ maskmovq      %mm7,%mm0
+ monitor
+ movntq                %mm2,(%rax)
+ mwait
+ pabsb           %mm1,%mm0
+ pabsd           %mm1,%mm0
+ pabsw           %mm1,%mm0
+ paddq           %mm1,%mm0
+ palignr         $0x2,%mm1,%mm0
+ pavgb         %mm1,%mm0
+ pavgw         %mm3,%mm2
+ pextrw                $0x0,%mm1,%eax
+ phaddd          %mm1,%mm0
+ phaddsw         %mm1,%mm0
+ phaddw          %mm1,%mm0
+ phsubd          %mm1,%mm0
+ phsubsw         %mm1,%mm0
+ phsubw          %mm1,%mm0
+ pinsrw                $0x2,%edx,%mm2
+ pmaddubsw       %mm1,%mm0
+ pmaxsw                %mm1,%mm0
+ pmaxub                %mm2,%mm2
+ pminsw                %mm5,%mm4
+ pminub                %mm7,%mm6
+ pmovmskb      %mm5,%eax
+ pmulhrsw        %mm1,%mm0
+ pmulhuw       %mm5,%mm4
+ pmuludq         %mm0, %mm1
+ popcnt %ebx,%ecx
+ prefetchnta   (%rax)
+ prefetcht0    (%rax)
+ prefetcht1    (%rax)
+ prefetcht2    (%rax)
+ psadbw                %mm7,%mm6
+ pshufb         %mm1,%mm0
+ pshufw                $0x1,%mm2,%mm3
+ psignb          %mm1,%mm0
+ psignd          %mm1,%mm0
+ psignw          %mm1,%mm0
+ psubq %mm1,%mm0
+ sfence