added english language description for lhasux instruction

diff --git a/openpower/isa/fixedloadshift.mdwn b/openpower/isa/fixedloadshift.mdwn
index a82c7100521c990a78c123807b2ed94aa28dacf4..897ec05267137a23c8e66d76c303ceb6dac8d978 100644 (file)
--- a/openpower/isa/fixedloadshift.mdwn
+++ b/openpower/isa/fixedloadshift.mdwn
@@ -166,6 +166,18 @@ Pseudo-code:
     RT <- EXTS(MEM(EA, 2))
     RA <- EA
 
+Description:
+
+    Let the effective address (EA) be the sum of the contents of
+    register (RB) shifted by (SH+1), and (RA).
+
+    The halfword in storage addressed by EA is loaded into RT[48:63].
+    RT[0:47] are filled with a copy of bit 0 of the loaded halfword.
+
+    EA is placed into register RA.
+
+    If RA=0 or RA=RT, the instruction form is invalid.
+
 Special Registers Altered:
 
     None