University, EE student, C/C++, Python, Verilog, assembly (not very proficient),
Haskell (not very proficient). RTL design, server maintenance.
E-mail: higuoxing at gmail dot com, Github: [Higuoxing](https://github.com/higuoxing) some of my projects are there :)
+* Aurojyoti Das(auro) - graduate student (MSc Electrical - Microelectronics)
+ at TU Delft, Netherlands. C/C++, Verilog, VHDL, SystemVerilog, RTL Design,
+ Logic Verification, Python/Perl/Shell scripting, Analog IC Design (currently learning)
Hardware available: