case 1: // xd <- acc (the only real work is the return statement below)
break;
case 2: // acc[rs2] <- Mem[xs1]
- acc[insn.rs2] = p->get_mmu()->load_uint64(xs1)
-#ifdef NOT_SPIKE_SIMPLEV
- .get_data()
-#endif
-;
+ acc[insn.rs2] = p->get_mmu()->load_uint64(xs1);
break;
case 3: // acc[rs2] <- accX + xs1
acc[insn.rs2] += xs1;
reg_t address = ((uint64_t) sbaddress[1] << 32) | sbaddress[0];
try {
if (sbcs.sbaccess == 0 && max_bus_master_bits >= 8) {
- sbdata[0] = sim->debug_mmu->load_uint8(address)
-#ifdef NOTYET_SPIKE_SIMPLEV
- .get_data()
-#endif
-;
+ sbdata[0] = sim->debug_mmu->load_uint8(address);
} else if (sbcs.sbaccess == 1 && max_bus_master_bits >= 16) {
- sbdata[0] = sim->debug_mmu->load_uint16(address)
-#ifdef NOTYET_SPIKE_SIMPLEV
- .get_data()
-#endif
-;
+ sbdata[0] = sim->debug_mmu->load_uint16(address);
} else if (sbcs.sbaccess == 2 && max_bus_master_bits >= 32) {
- sbdata[0] = sim->debug_mmu->load_uint32(address)
-#ifdef NOTYET_SPIKE_SIMPLEV
- .get_data()
-#endif
-;
+ sbdata[0] = sim->debug_mmu->load_uint32(address);
} else if (sbcs.sbaccess == 3 && max_bus_master_bits >= 64) {
- uint64_t value = sim->debug_mmu->load_uint64(address)
-#ifdef NOTYET_SPIKE_SIMPLEV
- .get_data()
-#endif
-;
+ uint64_t value = sim->debug_mmu->load_uint64(address);
sbdata[0] = value;
sbdata[1] = value >> 32;
} else {