OUT_RELOCW(ring, fd3_ctx->vsc_size_mem, 0, 0, 0); /* VSC_SIZE_ADDRESS */
for (i = 0; i < 8; i++) {
- struct fd_vsc_pipe *pipe = &ctx->pipe[i];
+ struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
if (!pipe->bo) {
pipe->bo = fd_bo_new(ctx->dev, 0x40000,
}
if (use_hw_binning(batch)) {
- struct fd_vsc_pipe *pipe = &ctx->pipe[tile->p];
+ struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[tile->p];
assert(pipe->w * pipe->h);
OUT_PKT0(ring, REG_A4XX_VSC_PIPE_CONFIG_REG(0), 8);
for (i = 0; i < 8; i++) {
- struct fd_vsc_pipe *pipe = &ctx->pipe[i];
+ struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
OUT_RING(ring, A4XX_VSC_PIPE_CONFIG_REG_X(pipe->x) |
A4XX_VSC_PIPE_CONFIG_REG_Y(pipe->y) |
A4XX_VSC_PIPE_CONFIG_REG_W(pipe->w) |
OUT_PKT0(ring, REG_A4XX_VSC_PIPE_DATA_ADDRESS_REG(0), 8);
for (i = 0; i < 8; i++) {
- struct fd_vsc_pipe *pipe = &ctx->pipe[i];
+ struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
if (!pipe->bo) {
pipe->bo = fd_bo_new(ctx->dev, 0x40000,
DRM_FREEDRENO_GEM_TYPE_KMEM);
OUT_PKT0(ring, REG_A4XX_VSC_PIPE_DATA_LENGTH_REG(0), 8);
for (i = 0; i < 8; i++) {
- struct fd_vsc_pipe *pipe = &ctx->pipe[i];
+ struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
OUT_RING(ring, fd_bo_size(pipe->bo) - 32); /* VSC_PIPE_DATA_LENGTH[i] */
}
}
uint32_t y2 = tile->yoff + tile->bin_h - 1;
if (use_hw_binning(batch)) {
- struct fd_vsc_pipe *pipe = &ctx->pipe[tile->p];
+ struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[tile->p];
assert(pipe->w * pipe->h);
OUT_PKT4(ring, REG_A5XX_VSC_PIPE_CONFIG_REG(0), 16);
for (i = 0; i < 16; i++) {
- struct fd_vsc_pipe *pipe = &ctx->pipe[i];
+ struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
OUT_RING(ring, A5XX_VSC_PIPE_CONFIG_REG_X(pipe->x) |
A5XX_VSC_PIPE_CONFIG_REG_Y(pipe->y) |
A5XX_VSC_PIPE_CONFIG_REG_W(pipe->w) |
OUT_PKT4(ring, REG_A5XX_VSC_PIPE_DATA_ADDRESS_LO(0), 32);
for (i = 0; i < 16; i++) {
- struct fd_vsc_pipe *pipe = &ctx->pipe[i];
+ struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
if (!pipe->bo) {
pipe->bo = fd_bo_new(ctx->dev, 0x20000,
DRM_FREEDRENO_GEM_TYPE_KMEM);
OUT_PKT4(ring, REG_A5XX_VSC_PIPE_DATA_LENGTH_REG(0), 16);
for (i = 0; i < 16; i++) {
- struct fd_vsc_pipe *pipe = &ctx->pipe[i];
+ struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
OUT_RING(ring, fd_bo_size(pipe->bo) - 32); /* VSC_PIPE_DATA_LENGTH[i] */
}
}
A5XX_RB_RESOLVE_CNTL_2_Y(y2));
if (use_hw_binning(batch)) {
- struct fd_vsc_pipe *pipe = &ctx->pipe[tile->p];
+ struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[tile->p];
OUT_PKT7(ring, CP_WAIT_FOR_ME, 0);
slab_destroy_child(&ctx->transfer_pool);
- for (i = 0; i < ARRAY_SIZE(ctx->pipe); i++) {
- struct fd_vsc_pipe *pipe = &ctx->pipe[i];
+ for (i = 0; i < ARRAY_SIZE(ctx->vsc_pipe); i++) {
+ struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
if (!pipe->bo)
break;
fd_bo_del(pipe->bo);
* means we'd always have to recalc tiles ever batch)
*/
struct fd_gmem_stateobj gmem;
- struct fd_vsc_pipe pipe[16];
+ struct fd_vsc_pipe vsc_pipe[16];
struct fd_tile tile[512];
/* which state objects need to be re-emit'd: */
/* configure pipes: */
xoff = yoff = 0;
for (i = 0; i < npipes; i++) {
- struct fd_vsc_pipe *pipe = &ctx->pipe[i];
+ struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
if (xoff >= nbins_x) {
xoff = 0;
}
for (; i < npipes; i++) {
- struct fd_vsc_pipe *pipe = &ctx->pipe[i];
+ struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
pipe->x = pipe->y = pipe->w = pipe->h = 0;
}