whoops, carry-over during rounding picks MSB not LSB
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 8 Jun 2021 16:33:16 +0000 (17:33 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 8 Jun 2021 16:33:16 +0000 (17:33 +0100)
openpower/isafunctions/double2single.mdwn
openpower/isafunctions/fpfromint.mdwn
src/openpower/decoder/isa/test_caller_fp.py

index bda22763e4fd3e0ea22fe1e41e3d2b778279f0cb..31686e4d966c4e553a6bbb3b036fc936c5468129 100644 (file)
@@ -29,7 +29,7 @@ Round to Single-Precision instruction.
         tmp        <- [0]*25
         tmp[1:24]  <- frac[0:23]
         tmp[0:24]  <- tmp[0:24] + inc
-        carry_out  <- tmp[24]
+        carry_out  <- tmp[0]
         frac[0:23] <- tmp[1:24]
         if carry_out = 1 then
             exp[0:10] <- exp + 1
index 2068509bfbf42aabacf4cefbb6e806f83ebd0e0a..67ae7583140d70c8a8d35df37dd95f012eac372d 100644 (file)
@@ -36,13 +36,13 @@ Convert From Integer instructions.
             tmp        <- [0]*25
             tmp[1:24]  <- frac[0:23]
             tmp[0:24]  <- tmp[0:24] + inc
-            carry_out  <- tmp[24]
+            carry_out  <- tmp[0]
             frac[0:23] <- tmp[1:24]
         else # tgt_precision = 'double-precision'
             tmp        <- [0]*54
             tmp[1:53]  <- frac[0:52]
             tmp[0:53]  <- tmp[0:53] + inc
-            carry_out  <- tmp[53]
+            carry_out  <- tmp[0]
             frac[0:52] <- tmp[1:53]
         if carry_out = 1 then exp <- exp + 1
         # TODO, later
index 83812637b92662a2558e55f9b980ad20dc49fa2f..bdb9351ebb35b7a55e2f7b29b9f9a82b3c16791c 100644 (file)
@@ -257,6 +257,21 @@ class DecoderTestCase(FHDLTestCase):
             # result should be -ve zero not +ve zero
             self.assertEqual(sim.fpr(3), SelectableInt(0x8000000000000000, 64))
 
+    def test_fp_muls5(self):
+        """>>> lst = ["fmuls 3, 1, 2",
+                     ]
+        """
+        lst = ["fmuls 3, 1, 2", #
+                     ]
+
+        fprs = [0] * 32
+        fprs[1] = 0xbfb0ab5100000000
+        fprs[2] = 0xbdca000000000000
+
+        with Program(lst, bigendian=False) as program:
+            sim = self.run_tst_program(program, initial_fprs=fprs)
+            self.assertEqual(sim.fpr(3), SelectableInt(0x3d8b1663a0000000, 64))
+
     def test_fp_mul(self):
         """>>> lst = ["fmul 3, 1, 2",
                      ]