instead of calling read_register.
* avr-tdep.c (avr_push_dummy_call): Write to REGCACHE instead of
calling write_register.
* hppa-tdep.c (hppa32_push_dummy_call): Write to REGCACHE instead of
calling write_register.
* ia64-tdep.c (find_func_descr): Add REGCACHE parameter. Use it
instead of calling read_register.
(ia64_push_dummy_call): Update call to find_func_descr. Use REGCACHE
instead of calling read_register and write_register.
* m32r-tdep.c (m32r_linux_supply_gregset): Use REGCACHE parameter
instead of current_regcache.
* mn10300-tdep.c (mn10300_push_dummy_call): Write to REGCACHE instead
of calling write_register.
* mn10300-linux-tdep.c (am33_supply_fpregset_method): Use REGCACHE
parameter instead of current_regcache.
* mips-tdep.c (mips2_fp_compat): Add FRAME parameter. Use it
instead of calling read_register.
(mips_read_fp_register_double, mips_print_fp_register): Update calls.
(mips_eabi_push_dummy_call): Use REGCACHE instead of write_register.
(mips_n32n64_push_dummy_call): Likewise.
(mips_o32_push_dummy_call): Likewise.
(mips_o64_push_dummy_call): Likewise.
* ppc-sysv-tdep.c (ppc_sysv_abi_push_dummy_call): Use REGCACHE
parameter instead of current_regcache.
* xtensa-tdep.c (xtensa_register_write_masked): Add REGCACHE parameter.
Use it instead of read_register and write_register.
(xtensa_register_read_masked): Likewise.
(xtensa_pseudo_register_read): Update call.
(xtensa_pseudo_register_write): Likewise.
(xtensa_frame_cache): Use register values unwound from NEXT_FRAME
instead of calling read_register.
(xtensa_push_dummy_call): Update comment.
+2007-06-15 Ulrich Weigand <uweigand@de.ibm.com>
+
+ * arm-tdep.c (arm_print_float_info): Use register value from FRAME
+ instead of calling read_register.
+
+ * avr-tdep.c (avr_push_dummy_call): Write to REGCACHE instead of
+ calling write_register.
+
+ * hppa-tdep.c (hppa32_push_dummy_call): Write to REGCACHE instead of
+ calling write_register.
+
+ * ia64-tdep.c (find_func_descr): Add REGCACHE parameter. Use it
+ instead of calling read_register.
+ (ia64_push_dummy_call): Update call to find_func_descr. Use REGCACHE
+ instead of calling read_register and write_register.
+
+ * m32r-tdep.c (m32r_linux_supply_gregset): Use REGCACHE parameter
+ instead of current_regcache.
+
+ * mn10300-tdep.c (mn10300_push_dummy_call): Write to REGCACHE instead
+ of calling write_register.
+ * mn10300-linux-tdep.c (am33_supply_fpregset_method): Use REGCACHE
+ parameter instead of current_regcache.
+
+ * mips-tdep.c (mips2_fp_compat): Add FRAME parameter. Use it
+ instead of calling read_register.
+ (mips_read_fp_register_double, mips_print_fp_register): Update calls.
+ (mips_eabi_push_dummy_call): Use REGCACHE instead of write_register.
+ (mips_n32n64_push_dummy_call): Likewise.
+ (mips_o32_push_dummy_call): Likewise.
+ (mips_o64_push_dummy_call): Likewise.
+
+ * ppc-sysv-tdep.c (ppc_sysv_abi_push_dummy_call): Use REGCACHE
+ parameter instead of current_regcache.
+
+ * xtensa-tdep.c (xtensa_register_write_masked): Add REGCACHE parameter.
+ Use it instead of read_register and write_register.
+ (xtensa_register_read_masked): Likewise.
+ (xtensa_pseudo_register_read): Update call.
+ (xtensa_pseudo_register_write): Likewise.
+ (xtensa_frame_cache): Use register values unwound from NEXT_FRAME
+ instead of calling read_register.
+ (xtensa_push_dummy_call): Update comment.
+
2007-06-15 Ulrich Weigand <uweigand@de.ibm.com>
* mips-tdep.c (mips16_scan_prologue): Replace read_next_frame_reg
arm_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
struct frame_info *frame, const char *args)
{
- unsigned long status = read_register (ARM_FPS_REGNUM);
+ unsigned long status = get_frame_register_unsigned (frame, ARM_FPS_REGNUM);
int type;
type = (status >> 24) & 127;
if (struct_return)
{
fprintf_unfiltered (gdb_stderr, "struct_return: 0x%lx\n", struct_addr);
- write_register (argreg--, struct_addr & 0xff);
- write_register (argreg--, (struct_addr >>8) & 0xff);
+ regcache_cooked_write_unsigned (regcache, argreg--, struct_addr & 0xff);
+ regcache_cooked_write_unsigned (regcache, argreg--, (struct_addr >>8) & 0xff);
}
#endif
/* If a structure has to be returned, set up register 28 to hold its
address */
if (struct_return)
- write_register (28, struct_addr);
+ regcache_cooked_write_unsigned (regcache, 28, struct_addr);
gp = tdep->find_global_pointer (function);
if (gp != 0)
- write_register (19, gp);
+ regcache_cooked_write_unsigned (regcache, 19, gp);
/* Set the return address. */
if (!gdbarch_push_dummy_code_p (gdbarch))
stack using the address at fdaptr. */
static CORE_ADDR
-find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
+find_func_descr (struct regcache *regcache, CORE_ADDR faddr, CORE_ADDR *fdaptr)
{
CORE_ADDR fdesc;
if (fdesc == 0)
{
- CORE_ADDR global_pointer;
+ ULONGEST global_pointer;
char buf[16];
fdesc = *fdaptr;
global_pointer = ia64_find_global_pointer (faddr);
if (global_pointer == 0)
- global_pointer = read_register (IA64_GR1_REGNUM);
+ regcache_cooked_read_unsigned (regcache,
+ IA64_GR1_REGNUM, &global_pointer);
store_unsigned_integer (buf, 8, faddr);
store_unsigned_integer (buf + 8, 8, global_pointer);
int len, argoffset;
int nslots, rseslots, memslots, slotnum, nfuncargs;
int floatreg;
- CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr, pc, global_pointer;
+ ULONGEST bsp, cfm, pfs, new_bsp;
+ CORE_ADDR funcdescaddr, pc, global_pointer;
CORE_ADDR func_addr = find_function_addr (function, NULL);
nslots = 0;
memslots = nslots - rseslots;
/* Allocate a new RSE frame. */
- cfm = read_register (IA64_CFM_REGNUM);
+ regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
- bsp = read_register (IA64_BSP_REGNUM);
+ regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
new_bsp = rse_address_add (bsp, rseslots);
- write_register (IA64_BSP_REGNUM, new_bsp);
+ regcache_cooked_write_unsigned (regcache, IA64_BSP_REGNUM, new_bsp);
- pfs = read_register (IA64_PFS_REGNUM);
+ regcache_cooked_read_unsigned (regcache, IA64_PFS_REGNUM, &pfs);
pfs &= 0xc000000000000000LL;
pfs |= (cfm & 0xffffffffffffLL);
- write_register (IA64_PFS_REGNUM, pfs);
+ regcache_cooked_write_unsigned (regcache, IA64_PFS_REGNUM, pfs);
cfm &= 0xc000000000000000LL;
cfm |= rseslots;
- write_register (IA64_CFM_REGNUM, cfm);
+ regcache_cooked_write_unsigned (regcache, IA64_CFM_REGNUM, cfm);
/* We will attempt to find function descriptors in the .opd segment,
but if we can't we'll construct them ourselves. That being the
&& TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
{
char val_buf[8];
-
+ ULONGEST faddr = extract_unsigned_integer (value_contents (arg), 8);
store_unsigned_integer (val_buf, 8,
- find_func_descr (extract_unsigned_integer (value_contents (arg), 8),
+ find_func_descr (regcache, faddr,
&funcdescaddr));
if (slotnum < rseslots)
write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
global_pointer = ia64_find_global_pointer (func_addr);
if (global_pointer != 0)
- write_register (IA64_GR1_REGNUM, global_pointer);
+ regcache_cooked_write_unsigned (regcache, IA64_GR1_REGNUM, global_pointer);
- write_register (IA64_BR0_REGNUM, bp_addr);
+ regcache_cooked_write_unsigned (regcache, IA64_BR0_REGNUM, bp_addr);
- write_register (sp_regnum, sp);
+ regcache_cooked_write_unsigned (regcache, sp_regnum, sp);
return sp;
}
break;
}
- regcache_raw_supply (current_regcache, i,
+ regcache_raw_supply (regcache, i,
regs + m32r_pt_regs_offset[i]);
}
}
physical 64-bit registers, but should treat them as 32-bit registers. */
static int
-mips2_fp_compat (void)
+mips2_fp_compat (struct frame_info *frame)
{
/* MIPS1 and MIPS2 have only 32 bit FPRs, and the FR bit is not
meaningful. */
/* Otherwise check the FR bit in the status register - it controls
the FP compatiblity mode. If it is clear we are in compatibility
mode. */
- if ((read_register (MIPS_PS_REGNUM) & ST0_FR) == 0)
+ if ((get_frame_register_unsigned (frame, MIPS_PS_REGNUM) & ST0_FR) == 0)
return 1;
#endif
fprintf_unfiltered (gdb_stdlog,
"mips_eabi_push_dummy_call: struct_return reg=%d 0x%s\n",
argreg, paddr_nz (struct_addr));
- write_register (argreg++, struct_addr);
+ regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
}
/* Now load as many as possible of the first arguments into
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
float_argreg, phex (regval, 4));
- write_register (float_argreg++, regval);
+ regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
/* Write the high word of the double to the odd register(s). */
regval = extract_unsigned_integer (val + 4 - low_offset, 4);
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
float_argreg, phex (regval, 4));
- write_register (float_argreg++, regval);
+ regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
}
else
{
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
float_argreg, phex (regval, len));
- write_register (float_argreg++, regval);
+ regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
}
}
else
fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
argreg,
phex (regval, regsize));
- write_register (argreg, regval);
+ regcache_cooked_write_unsigned (regcache, argreg, regval);
argreg++;
}
fprintf_unfiltered (gdb_stdlog,
"mips_n32n64_push_dummy_call: struct_return reg=%d 0x%s\n",
argreg, paddr_nz (struct_addr));
- write_register (argreg++, struct_addr);
+ regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
}
/* Now load as many as possible of the first arguments into
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
float_argreg, phex (regval, len));
- write_register (float_argreg++, regval);
+ regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
argreg, phex (regval, len));
- write_register (argreg, regval);
+ regcache_cooked_write_unsigned (regcache, argreg, regval);
argreg += 1;
}
else
fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
argreg,
phex (regval, MIPS64_REGSIZE));
- write_register (argreg, regval);
+ regcache_cooked_write_unsigned (regcache, argreg, regval);
argreg++;
}
fprintf_unfiltered (gdb_stdlog,
"mips_o32_push_dummy_call: struct_return reg=%d 0x%s\n",
argreg, paddr_nz (struct_addr));
- write_register (argreg++, struct_addr);
+ regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
stack_offset += MIPS32_REGSIZE;
}
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
float_argreg, phex (regval, 4));
- write_register (float_argreg++, regval);
+ regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
argreg, phex (regval, 4));
- write_register (argreg++, regval);
+ regcache_cooked_write_unsigned (regcache, argreg++, regval);
/* Write the high word of the double to the odd register(s). */
regval = extract_unsigned_integer (val + 4 - low_offset, 4);
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
float_argreg, phex (regval, 4));
- write_register (float_argreg++, regval);
+ regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
argreg, phex (regval, 4));
- write_register (argreg++, regval);
+ regcache_cooked_write_unsigned (regcache, argreg++, regval);
}
else
{
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
float_argreg, phex (regval, len));
- write_register (float_argreg++, regval);
+ regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
/* CAGNEY: 32 bit MIPS ABI's always reserve two FP
registers for each argument. The below is (my
guess) to ensure that the corresponding integer
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
argreg, phex (regval, len));
- write_register (argreg, regval);
+ regcache_cooked_write_unsigned (regcache, argreg, regval);
argreg += 2;
}
/* Reserve space for the FP register. */
fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
argreg,
phex (regval, MIPS32_REGSIZE));
- write_register (argreg, regval);
+ regcache_cooked_write_unsigned (regcache, argreg, regval);
argreg++;
/* Prevent subsequent floating point arguments from
fprintf_unfiltered (gdb_stdlog,
"mips_o64_push_dummy_call: struct_return reg=%d 0x%s\n",
argreg, paddr_nz (struct_addr));
- write_register (argreg++, struct_addr);
+ regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
stack_offset += MIPS64_REGSIZE;
}
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
float_argreg, phex (regval, len));
- write_register (float_argreg++, regval);
+ regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
argreg, phex (regval, len));
- write_register (argreg, regval);
+ regcache_cooked_write_unsigned (regcache, argreg, regval);
argreg++;
/* Reserve space for the FP register. */
stack_offset += align_up (len, MIPS64_REGSIZE);
fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
argreg,
phex (regval, MIPS64_REGSIZE));
- write_register (argreg, regval);
+ regcache_cooked_write_unsigned (regcache, argreg, regval);
argreg++;
/* Prevent subsequent floating point arguments from
{
int raw_size = register_size (current_gdbarch, regno);
- if (raw_size == 8 && !mips2_fp_compat ())
+ if (raw_size == 8 && !mips2_fp_compat (frame))
{
/* We have a 64-bit value for this register, and we should use
all 64 bits. */
(current_gdbarch, regnum)),
"");
- if (register_size (current_gdbarch, regnum) == 4 || mips2_fp_compat ())
+ if (register_size (current_gdbarch, regnum) == 4 || mips2_fp_compat (frame))
{
/* 4-byte registers: Print hex and floating. Also print even
numbered registers as doubles. */
E_FPCR_REGNUM, fpregs, len);
}
else if (regnum == E_FPCR_REGNUM)
- regcache_raw_supply (current_regcache, E_FPCR_REGNUM,
+ regcache_raw_supply (regcache, E_FPCR_REGNUM,
&fpregset->fpcr);
else if (E_FS0_REGNUM <= regnum && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
- regcache_raw_supply (current_regcache, regnum,
+ regcache_raw_supply (regcache, regnum,
&fpregset->fpregs[regnum - E_FS0_REGNUM]);
return;
E_FPCR_REGNUM, fpregs, len);
}
else if (regnum == E_FPCR_REGNUM)
- regcache_raw_collect (current_regcache, E_FPCR_REGNUM,
+ regcache_raw_collect (regcache, E_FPCR_REGNUM,
&fpregset->fpcr);
else if (E_FS0_REGNUM <= regnum
&& regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
- regcache_raw_collect (current_regcache, regnum,
+ regcache_raw_collect (regcache, regnum,
&fpregset->fpregs[regnum - E_FS0_REGNUM]);
return;
if (struct_return)
{
regs_used = 1;
- write_register (E_D0_REGNUM, struct_addr);
+ regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr);
}
else
regs_used = 0;
while (regs_used < 2 && arg_len > 0)
{
- write_register (regs_used,
- extract_unsigned_integer (val, push_size));
+ regcache_cooked_write_unsigned (regcache, regs_used,
+ extract_unsigned_integer (val, push_size));
val += push_size;
arg_len -= push_size;
regs_used++;
if (vreg <= 13)
{
if (write_pass)
- regcache_cooked_write (current_regcache,
+ regcache_cooked_write (regcache,
tdep->ppc_vr0_regnum + vreg, val);
vreg++;
}
if (greg <= 10)
{
if (write_pass)
- regcache_cooked_write (current_regcache,
+ regcache_cooked_write (regcache,
tdep->ppc_ev0_regnum + greg, val);
greg++;
}
(Note: The size of masked registers is always less or equal 32 bits.) */
static void
-xtensa_register_write_masked (xtensa_register_t *reg, unsigned char *buffer)
+xtensa_register_write_masked (struct regcache *regcache,
+ xtensa_register_t *reg, const gdb_byte *buffer)
{
unsigned int value[(MAX_REGISTER_SIZE + 3) / 4];
if (r >= 0 && size > 0)
{
/* Don't overwrite the unmasked areas. */
+ ULONGEST old_val;
+ regcache_cooked_read_unsigned (regcache, r, &old_val);
m = 0xffffffff >> (32 - size) << start;
regval <<= start;
- regval = (regval & m) | (read_register (r) & ~m);
- write_register (r, regval);
+ regval = (regval & m) | (old_val & ~m);
+ regcache_cooked_write_unsigned (regcache, r, regval);
}
}
}
register. */
static void
-xtensa_register_read_masked (xtensa_register_t *reg, unsigned char *buffer)
+xtensa_register_read_masked (struct regcache *regcache,
+ xtensa_register_t *reg, gdb_byte *buffer)
{
unsigned int value[(MAX_REGISTER_SIZE + 3) / 4];
for (i = 0; i < mask->count; i++)
{
int r = mask->mask[i].reg_num;
- regval = (r >= 0) ? read_register (r) : 0;
+ if (r >= 0)
+ {
+ ULONGEST val;
+ regcache_cooked_read_unsigned (regcache, r, &val);
+ regval = (unsigned int) val;
+ }
+ else
+ regval = 0;
+
start = mask->mask[i].bit_start;
size = mask->mask[i].bit_size;
/* We can always read mapped registers. */
else if (type == xtRegisterTypeMapped || type == xtRegisterTypeTieState)
{
- xtensa_register_read_masked (reg, (unsigned char *) buffer);
+ xtensa_register_read_masked (regcache, reg, buffer);
return;
}
/* We can always write mapped registers. */
else if (type == xtRegisterTypeMapped || type == xtRegisterTypeTieState)
{
- xtensa_register_write_masked (reg, (unsigned char *) buffer);
+ xtensa_register_write_masked (regcache, reg, buffer);
return;
}
pc = frame_unwind_register_unsigned (next_frame, PC_REGNUM);
op1 = read_memory_integer (pc, 1);
- if (XTENSA_IS_ENTRY (op1) || !windowing_enabled (read_register (PS_REGNUM)))
+ if (XTENSA_IS_ENTRY (op1) || !windowing_enabled (ps))
{
- int callinc = CALLINC (frame_unwind_register_unsigned (next_frame,
- PS_REGNUM));
+ int callinc = CALLINC (ps);
ra = frame_unwind_register_unsigned (next_frame,
A0_REGNUM + callinc * 4);
cache->callsize = 0;
cache->wb = wb;
cache->ws = ws;
- cache->prev_sp = read_register (A1_REGNUM);
+ cache->prev_sp = frame_unwind_register_unsigned (next_frame, A1_REGNUM);
}
else
{
int regnum = AREG_NUMBER (A1_REGNUM, cache->wb);
- cache->prev_sp = read_register (regnum);
+ cache->prev_sp = frame_unwind_register_unsigned (next_frame, regnum);
}
}
/* ULONGEST v = extract_unsigned_integer (cp, REGISTER_SIZE);*/
regcache_cooked_write (regcache, r, cp);
- /* write_register (r, v); */
+ /* regcache_cooked_write_unsigned (regcache, r, v); */
cp += REGISTER_SIZE;
n -= REGISTER_SIZE;
r++;
projects / binutils-gdb.git / commitdiff