gallium: add PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET
authorMarek Olšák <marek.olsak@amd.com>
Sat, 1 Sep 2018 00:52:29 +0000 (20:52 -0400)
committerMarek Olšák <marek.olsak@amd.com>
Fri, 7 Sep 2018 21:59:02 +0000 (17:59 -0400)
16 files changed:
src/gallium/auxiliary/util/u_screen.c
src/gallium/docs/source/screen.rst
src/gallium/drivers/etnaviv/etnaviv_screen.c
src/gallium/drivers/i915/i915_screen.c
src/gallium/drivers/llvmpipe/lp_screen.c
src/gallium/drivers/nouveau/nv30/nv30_screen.c
src/gallium/drivers/nouveau/nv50/nv50_screen.c
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
src/gallium/drivers/r300/r300_screen.c
src/gallium/drivers/r600/r600_pipe.c
src/gallium/drivers/radeonsi/si_get.c
src/gallium/drivers/softpipe/sp_screen.c
src/gallium/drivers/svga/svga_screen.c
src/gallium/drivers/swr/swr_screen.cpp
src/gallium/drivers/virgl/virgl_screen.c
src/gallium/include/pipe/p_defines.h

index 4843ba57567477ab7189799395cc31347a714687..07c63aa3700ea37cf14e9248066c91e4a122b802 100644 (file)
@@ -320,6 +320,7 @@ u_pipe_screen_get_param_defaults(struct pipe_screen *pscreen,
       return 1 << 27;
 
    case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
+   case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
       return 0;
 
    default:
index e2b09d7b9c54e6dfc63b66ed66e2436a284775de..b5ad8f970d2f6c0a57bb3c1b3976bebef7610572 100644 (file)
@@ -472,6 +472,9 @@ subpixel precision bias in bits during conservative rasterization.
 * ``PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS``: Maximum total number of
   atomic counter buffers. A value of 0 means the sum of all per-shader stage
   maximums (see ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS``).
+* ``PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET: Maximum recommend memory size
+  for all active texture uploads combined. This is a performance hint.
+  0 means no limit.
 
 .. _pipe_capf:
 
index cafc8bf1f5b488e0a5b45e9a590d01bfba1fcbb6..d838cd28c8854bee7bf2733019ebe9186937b273 100644 (file)
@@ -286,6 +286,7 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
    case PIPE_CAP_PACKED_UNIFORMS:
    case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
+   case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
       return 0;
 
    case PIPE_CAP_MAX_GS_INVOCATIONS:
index 5926d3555080bfe3e6d81275012a025dd406f519..169f502f05a6e96a3c28c0db9004567c4246117b 100644 (file)
@@ -292,6 +292,7 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
    case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
    case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
    case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
+   case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
       return 0;
 
    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
index 15ddaf5333b4a9a14c5fc2ab14894b95f0f102cc..f706bf9c9c453ab28381ce9eb8a1a1d969240aa7 100644 (file)
@@ -138,6 +138,7 @@ llvmpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_TEXTURE_SWIZZLE:
       return 1;
    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
+   case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
       return 0;
    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
       return LP_MAX_TEXTURE_2D_LEVELS;
index 1e0b5728ddfc9e07ccdc760b14ec55b47a1fc70b..1d4e8c6aedbc6e234ad13fc3597f82f7c9cd9521 100644 (file)
@@ -241,6 +241,7 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
    case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
    case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
+   case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
       return 0;
 
    case PIPE_CAP_MAX_GS_INVOCATIONS:
index 210ce18a8c8b3201a4f6e9450c7b2c0a9bca740e..0e3424ff82b18ab7d17899216090f364e6e31be5 100644 (file)
@@ -295,6 +295,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
    case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
    case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
+   case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
       return 0;
 
    case PIPE_CAP_MAX_GS_INVOCATIONS:
index 6ad99ed6d65995b7d45993b0e3ee38ed8082e26b..461f7aed24ac804155ac271597da5924cfbda2c0 100644 (file)
@@ -322,6 +322,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_CONSTBUF0_FLAGS:
    case PIPE_CAP_PACKED_UNIFORMS:
    case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
+   case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
       return 0;
 
    case PIPE_CAP_VENDOR_ID:
index 0c95acdad4b8c3c20628837fa7f77c957973975c..a464cfb650192668278fc41f5f6ebd6c49fa9b7f 100644 (file)
@@ -263,6 +263,7 @@ static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
         case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
         case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
         case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
+        case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
             return 0;
 
         case PIPE_CAP_MAX_GS_INVOCATIONS:
index e7ad2ee39a821b7223ab7c703f898d05210d7475..2680396c3d608e8fbc23f03b105a0cf5fc797d5a 100644 (file)
@@ -311,6 +311,10 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
                return 1;
 
+       case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
+               /* Optimal number for good TexSubImage performance on Polaris10. */
+               return 64 * 1024 * 1024;
+
        case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
                return rscreen->b.info.drm_major == 2 && rscreen->b.info.drm_minor >= 43;
 
index 5d9061e49e9e1160a38afb2f52e3775a0ca03479..a87cb3cbc8af829060b05495039f69160eb99d8a 100644 (file)
@@ -190,6 +190,10 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
                                return 450;
                return 420;
 
+       case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
+               /* Optimal number for good TexSubImage performance on Polaris10. */
+               return 64 * 1024 * 1024;
+
        case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
        case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
                return MIN2(sscreen->info.max_alloc_size, INT_MAX);
index 61a4133d30d35776a42f9a896343928ebeca9cb4..bd8f655838a56dc28cdf6de1710902166afd829d 100644 (file)
@@ -92,6 +92,7 @@ softpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_TEXTURE_SWIZZLE:
       return 1;
    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
+   case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
       return 0;
    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
       return SP_MAX_TEXTURE_2D_LEVELS;
index ea22a4fe7d48aa114fd07dc9aed2f66c928abda3..be653bd4fe253d827490edb63179f573cbcf0933 100644 (file)
@@ -392,6 +392,7 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
    case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
    case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
+   case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
       return 0;
    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
       return 64;
index 2190be4b571a1a5a915e125ab32a949b64b6c898..de9008ddf6afa3e82584c56f34908b004e17e9c1 100644 (file)
@@ -363,6 +363,7 @@ swr_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
    case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
    case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
+   case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
       return 0;
    case PIPE_CAP_MAX_GS_INVOCATIONS:
       return 32;
index a72ea3a3a1a1cff7bc01ff3a9e190026771368e0..e71883b06f1c83883c750ab92f26be30cbe4b2b9 100644 (file)
@@ -324,6 +324,7 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
    case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
    case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
+   case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
       return 0;
    case PIPE_CAP_MAX_GS_INVOCATIONS:
       return 32;
index f6052196733f74187fc0887402110116627fbc8c..6f11527d5ca2d1d3b3f149c94a8a898528e96a61 100644 (file)
@@ -823,6 +823,7 @@ enum pipe_cap
    PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS,
    PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS,
    PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS,
+   PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET,
 };
 
 /**