+2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
+
+ * ld-aarch64/emit-relocs-309-low.d: Adjust .text address.
+ * ld-aarch64/emit-relocs-309-up.d: Adjust .got address.
+ * ld-aarch64/emit-relocs-312.d: Adjust offsets into .got.
+ * ld-aarch64/tls-relax-all.d: Likewise.
+ * ld-aarch64/gc-got-relocs.d: Adjust expected .got content.
+ * ld-aarch64/gc-tls-relocs.d: Likewise.
+ * ld-aarch64/tls-relax-gd-ie.d: Likewise.
+ * ld-aarch64/tls-relax-gdesc-ie-2.d: Likewise.
+ * ld-aarch64/tls-relax-gdesc-ie.d: Likewise.
+
2013-07-02 Alan Modra <amodra@gmail.com>
* elf64-ppc.c (ppc64_elf_relocate_section): Set "relocation" for
#name: aarch64-emit-relocs-309-low
#source: emit-relocs-309.s
#as:
-#ld: -Ttext 0xFFFFC --section-start .got=0x0
+#ld: -Ttext 0x100004 --section-start .got=0x0
#objdump: -dr
#...
Disassembly of section \.text:
-00000000000ffffc <_start>:
- ffffc: d503201f nop
- 100000: 58800000 ldr x0, 0 .*
+0000000000100004 <_start>:
+ 100004: d503201f nop
+ 100008: 58800000 ldr x0, 8 .*
#name: aarch64-emit-relocs-309-up
#source: emit-relocs-309.s
#as:
-#ld: -Ttext 0x0 --section-start .got=0x100000
+#ld: -Ttext 0x0 --section-start .got=0xffff8
#objdump: -dr
#...
+1000c: R_AARCH64_LD_PREL_LO19 tempy2
+10010: 58f89131 ldr x17, 1234 <tempy3>
+10010: R_AARCH64_LD_PREL_LO19 tempy3
- +10014: f9400843 ldr x3, \[x2.*
+ +10014: f9400c43 ldr x3, \[x2.*
+10014: R_AARCH64_LD64_GOT_LO12_NC jempy
- +10018: f9400444 ldr x4, \[x2.*
+ +10018: f9400844 ldr x4, \[x2.*
+10018: R_AARCH64_LD64_GOT_LO12_NC gempy
- +1001c: f9400045 ldr x5, \[x2.*
+ +1001c: f9400445 ldr x5, \[x2.*
+1001c: R_AARCH64_LD64_GOT_LO12_NC lempy
8000 1f2003d5 .*
Contents of section .got:
9000 0+ 0+ 0+ 0+ .*
- 9010 0+ 0+ .*
+ 9010 0+ 0+ 0+ 0+ .*
Disassembly of section .text:
8000 1f2003d5 .*
Contents of section .got:
9000 0+ 0+ 0+ 0+ .*
- 9010 0+ 0+ .*
+ 9010 0+ 0+ 0+ 0+ .*
Disassembly of section .text:
+10000: a9bf7bfd stp x29, x30, \[sp,#-16\]!
+10004: 910003fd mov x29, sp
+10008: 90000080 adrp x0, 20000 <ie_var\+0x1fff0>
- +1000c: f9400000 ldr x0, \[x0\]
+ +1000c: f9400400 ldr x0, \[x0,#8\]
+10010: d503201f nop
+10014: d503201f nop
+10018: d53bd041 mrs x1, tpidr_el0
+1003c: b9400000 ldr w0, \[x0\]
+10040: 0b000021 add w1, w1, w0
+10044: 90000080 adrp x0, 20000 <ie_var\+0x1fff0>
- +10048: f9400400 ldr x0, \[x0,#8\]
+ +10048: f9400800 ldr x0, \[x0,#16\]
+1004c: d53bd041 mrs x1, tpidr_el0
+10050: 8b000020 add x0, x1, x0
+10054: b9400000 ldr w0, \[x0\]
#objdump: -dr
#...
+10000: 90000080 adrp x0, 20000 <var\+0x20000>
- +10004: f9400000 ldr x0, \[x0\]
+ +10004: f9400400 ldr x0, \[x0,#8\]
+10008: d53bd041 mrs x1, tpidr_el0
+1000c: 8b000020 add x0, x1, x0
+10010: b9400000 ldr w0, \[x0\]
#...
+10000: 90000080 adrp x0, 20000 <var\+0x20000>
+10004: d503201f nop
- +10008: f9400000 ldr x0, \[x0\]
+ +10008: f9400400 ldr x0, \[x0,#8\]
+1000c: d503201f nop
+10010: d503201f nop
+10014: d503201f nop
#objdump: -dr
#...
+10000: 90000080 adrp x0, 20000 <var\+0x20000>
- +10004: f9400000 ldr x0, \[x0\]
+ +10004: f9400400 ldr x0, \[x0,#8\]
+10008: d503201f nop
+1000c: d503201f nop
+10010: d53bd041 mrs x1, tpidr_el0