sw->signal = RTLIL::SigSpec();
}
- if (sw->cases.size() == 1 && (sw->signal.size() == 0 || sw->cases[0]->compare.empty()))
+ if (parent->switches.front() == sw && sw->cases.size() == 1 &&
+ (sw->signal.size() == 0 || sw->cases[0]->compare.empty()))
{
did_something = true;
for (auto &action : sw->cases[0]->actions)
for (size_t i = 0; i < sw->cases.size(); i++)
{
- bool is_default = sw->cases[i]->compare.size() == 0 && !pool.empty();
+ bool is_default = SIZE(sw->cases[i]->compare) == 0 && (!pool.empty() || SIZE(sw->signal) == 0);
for (size_t j = 0; j < sw->cases[i]->compare.size(); j++) {
RTLIL::SigSpec sig = sw->cases[i]->compare[j];