return 0;
}
-/* Get Linux/x86 target description from core dump. */
-
-static const struct target_desc *
-amd64_linux_core_read_description (struct gdbarch *gdbarch,
- struct target_ops *target,
- bfd *abfd)
+const target_desc *
+amd64_linux_read_description (uint64_t xcr0_features_bit, bool is_x32)
{
- /* Linux/x86-64. */
- uint64_t xcr0 = i386_linux_core_read_xcr0 (abfd);
-
- switch (xcr0 & X86_XSTATE_ALL_MASK)
+ switch (xcr0_features_bit)
{
case X86_XSTATE_AVX_MPX_AVX512_PKU_MASK:
- if (gdbarch_ptr_bit (gdbarch) == 32)
+ if (is_x32)
/* No MPX, PKU on x32, fallback to AVX-AVX512. */
return tdesc_x32_avx_avx512_linux;
else
return tdesc_amd64_avx_mpx_avx512_pku_linux;
case X86_XSTATE_AVX_AVX512_MASK:
- if (gdbarch_ptr_bit (gdbarch) == 32)
+ if (is_x32)
return tdesc_x32_avx_avx512_linux;
else
return tdesc_amd64_avx_avx512_linux;
case X86_XSTATE_MPX_MASK:
- if (gdbarch_ptr_bit (gdbarch) == 32)
+ if (is_x32)
/* No MPX on x32, fallback to AVX. */
return tdesc_x32_avx_linux;
else
return tdesc_amd64_mpx_linux;
case X86_XSTATE_AVX_MPX_MASK:
- if (gdbarch_ptr_bit (gdbarch) == 32)
+ if (is_x32)
/* No MPX on x32, fallback to AVX. */
return tdesc_x32_avx_linux;
else
return tdesc_amd64_avx_mpx_linux;
case X86_XSTATE_AVX_MASK:
- if (gdbarch_ptr_bit (gdbarch) == 32)
+ if (is_x32)
return tdesc_x32_avx_linux;
else
return tdesc_amd64_avx_linux;
default:
- if (gdbarch_ptr_bit (gdbarch) == 32)
+ if (is_x32)
return tdesc_x32_linux;
else
return tdesc_amd64_linux;
}
}
+/* Get Linux/x86 target description from core dump. */
+
+static const struct target_desc *
+amd64_linux_core_read_description (struct gdbarch *gdbarch,
+ struct target_ops *target,
+ bfd *abfd)
+{
+ /* Linux/x86-64. */
+ uint64_t xcr0 = i386_linux_core_read_xcr0 (abfd);
+
+ return amd64_linux_read_description (xcr0 & X86_XSTATE_ALL_MASK,
+ gdbarch_ptr_bit (gdbarch) == 32);
+}
+
/* Similar to amd64_supply_fpregset, but use XSAVE extended state. */
static void
tdep->gregset_num_regs = ARRAY_SIZE (amd64_linux_gregset_reg_offset);
tdep->sizeof_gregset = 27 * 8;
- amd64_init_abi (info, gdbarch, tdesc_amd64_linux);
+ amd64_init_abi (info, gdbarch,
+ amd64_linux_read_description (X86_XSTATE_SSE_MASK, false));
const target_desc *tdesc = tdep->tdesc;
tdep->gregset_num_regs = ARRAY_SIZE (amd64_linux_gregset_reg_offset);
tdep->sizeof_gregset = 27 * 8;
- amd64_x32_init_abi (info, gdbarch, tdesc_x32_linux);
+ amd64_x32_init_abi (info, gdbarch,
+ amd64_linux_read_description (X86_XSTATE_SSE_MASK,
+ true));
/* Reserve a number for orig_rax. */
set_gdbarch_num_regs (gdbarch, AMD64_LINUX_NUM_REGS);
if (is_64bit)
{
#ifdef __x86_64__
- switch (xcr0_features_bits)
- {
- case X86_XSTATE_AVX_MPX_AVX512_PKU_MASK:
- if (is_x32)
- /* No MPX, PKU on x32, fall back to AVX-AVX512. */
- return tdesc_x32_avx_avx512_linux;
- else
- return tdesc_amd64_avx_mpx_avx512_pku_linux;
- case X86_XSTATE_AVX_AVX512_MASK:
- if (is_x32)
- return tdesc_x32_avx_avx512_linux;
- else
- return tdesc_amd64_avx_avx512_linux;
- case X86_XSTATE_MPX_MASK:
- if (is_x32)
- return tdesc_x32_avx_linux; /* No MPX on x32 using AVX. */
- else
- return tdesc_amd64_mpx_linux;
- case X86_XSTATE_AVX_MPX_MASK:
- if (is_x32)
- return tdesc_x32_avx_linux; /* No MPX on x32 using AVX. */
- else
- return tdesc_amd64_avx_mpx_linux;
- case X86_XSTATE_AVX_MASK:
- if (is_x32)
- return tdesc_x32_avx_linux;
- else
- return tdesc_amd64_avx_linux;
- default:
- if (is_x32)
- return tdesc_x32_linux;
- else
- return tdesc_amd64_linux;
- }
+ return amd64_linux_read_description (xcr0_features_bits, is_x32);
#endif
}
else