Instruction Set
---------------
-From GL_NV_vertex_program
+Core ISA
^^^^^^^^^^^^^^^^^^^^^^^^^
+These opcodes are guaranteed to be available regardless of the driver being
+used.
.. opcode:: ARL - Address Register Load
Considered for removal.
-From GL_NV_vertex_program2
-^^^^^^^^^^^^^^^^^^^^^^^^^^
-
-
.. opcode:: ARA - Address Register Add
TBD
Considered for removal.
-From GL_NV_gpu_program4
+Compute ISA
^^^^^^^^^^^^^^^^^^^^^^^^
+These opcodes are primarily provided for special-use computational shaders.
Support for these opcodes indicated by a special pipe capability bit (TBD).
+XXX so let's discuss it, yeah?
+
.. opcode:: CEIL - Ceiling
.. math::
TBD
+.. note::
+
+ Support for CONT is determined by a special capability bit,
+ ``TGSI_CONT_SUPPORTED``. See :ref:`Screen` for more information.
+
-From GL_NV_geometry_program4
+Geometry ISA
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+These opcodes are only supported in geometry shaders; they have no meaning
+in any other type of shader.
.. opcode:: EMIT - Emit
TBD
-From GLSL
+GLSL ISA
^^^^^^^^^^
+These opcodes are part of :term:`GLSL`'s opcode set. Support for these
+opcodes is determined by a special capability bit, ``GLSL``.
.. opcode:: BGNLOOP - Begin a Loop
ps_2_x
^^^^^^^^^^^^
+XXX wait what
.. opcode:: CALLNZ - Subroutine Call If Not Zero
.. _doubleopcodes:
-Double Opcodes
+Double ISA
^^^^^^^^^^^^^^^
.. opcode:: DADD - Add Double