aarch64.md (popcount<mode>2): New pattern.
authorAndrew Pinski <apinski@cavium.com>
Wed, 8 Feb 2017 02:54:17 +0000 (02:54 +0000)
committerNaveen H.S <naveenh@gcc.gnu.org>
Wed, 8 Feb 2017 02:54:17 +0000 (02:54 +0000)
2016-02-07  Andrew Pinski  <apinski@cavium.com>

gcc
* config/aarch64/aarch64.md (popcount<mode>2): New pattern.

gcc/testsuite
* gcc.target/aarch64/popcount.c : New Testcase.

From-SVN: r245267

gcc/ChangeLog
gcc/config/aarch64/aarch64.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/aarch64/popcnt.c [new file with mode: 0644]

index ead1661df3bc897c1f08a05d6b93a00515186c72..527143ac944834cb65f9941b249a9c9054d02338 100644 (file)
@@ -1,3 +1,7 @@
+2017-02-07  Andrew Pinski  <apinski@cavium.com>
+
+       * config/aarch64/aarch64.md (popcount<mode>2): New pattern.
+
 2017-02-07  Andrew Pinski  <apinski@cavium.com>
 
        * config/aarch64/aarch64-cores.def (thunderx): Disable LSE.
index 7550c3e7c2bb370681e52bce580c5105c877b298..5adc5edb8dde9c30450b04932a37c41f84cc5ed1 100644 (file)
   }
 )
 
+;; Pop count be done via the "CNT" instruction in AdvSIMD.
+;;
+;; MOV v.1d, x0
+;; CNT v1.8b, v.8b
+;; ADDV b2, v1.8b
+;; MOV w0, v2.b[0]
+
+(define_expand "popcount<mode>2"
+  [(match_operand:GPI 0 "register_operand")
+   (match_operand:GPI 1 "register_operand")]
+  "TARGET_SIMD"
+{
+  rtx v = gen_reg_rtx (V8QImode);
+  rtx v1 = gen_reg_rtx (V8QImode);
+  rtx r = gen_reg_rtx (QImode);
+  rtx in = operands[1];
+  rtx out = operands[0];
+  if(<MODE>mode == SImode)
+    {
+      rtx tmp;
+      tmp = gen_reg_rtx (DImode);
+      /* If we have SImode, zero extend to DImode, pop count does
+         not change if we have extra zeros. */
+      emit_insn (gen_zero_extendsidi2 (tmp, in));
+      in = tmp;
+    }
+  emit_move_insn (v, gen_lowpart (V8QImode, in));
+  emit_insn (gen_popcountv8qi2 (v1, v));
+  emit_insn (gen_reduc_plus_scal_v8qi (r, v1));
+  emit_insn (gen_zero_extendqi<mode>2 (out, r));
+  DONE;
+})
+
 (define_insn "clrsb<mode>2"
   [(set (match_operand:GPI 0 "register_operand" "=r")
         (clrsb:GPI (match_operand:GPI 1 "register_operand" "r")))]
index 7d793de238fb706052df88445c649f56be71e371..81b25807dd0bfa53638eaa42ae299a4d4f102ee1 100644 (file)
@@ -1,3 +1,7 @@
+2017-02-07  Andrew Pinski  <apinski@cavium.com>
+
+       * gcc.target/aarch64/popcount.c : New Testcase.
+
 2017-02-07  Jakub Jelinek  <jakub@redhat.com>
 
        PR rtl-optimization/79386
diff --git a/gcc/testsuite/gcc.target/aarch64/popcnt.c b/gcc/testsuite/gcc.target/aarch64/popcnt.c
new file mode 100644 (file)
index 0000000..7e95796
--- /dev/null
@@ -0,0 +1,23 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int
+foo (int x)
+{
+  return __builtin_popcount (x);
+}
+
+long
+foo1 (long x)
+{
+  return __builtin_popcountl (x);
+}
+
+long long
+foo2 (long long x)
+{
+  return __builtin_popcountll (x);
+}
+
+/* { dg-final { scan-assembler-not "popcount" } } */
+/* { dg-final { scan-assembler-times "cnt\t" 3 } } */