Revert recent changes about not including compute in combined limits.

As far as I can tell, no one reviewed these changes, they made i965
assert fail on driver load, and I am not certain they are correct.
(Hopefully reverting these does not break radeonsi too badly...)

The uniform related changes seem fine and reasonable, but the texture
image units change is possibly incorrect.  According to the
OES_tessellation_shader spec issue 5:

   (5) How are aggregate shader limits computed?

    RESOLVED: Following the GL 4.4 model, but we restrict uniform
    buffer bindings to 12/stage instead of 14, this results in

        MAX_UNIFORM_BUFFER_BINDINGS = 72
            This is 12 bindings/stage * 6 shader stages, allowing a static
            partitioning of the bindings even though at most 5 stages can
            appear in a program object).
        MAX_COMBINED_UNIFORM_BLOCKS = 60
            This is 12 blocks/stage * 5 stages, since compute shaders can't
            be mixed with other stages.
        MAX_COMBINED_TEXTURE_IMAGE_UNITS = 96
            This is 16 textures/stage * 6 stages.

which definitely is including compute shaders in that last limit.
Not including compute shaders breaks the following test:
dEQP-GLES31.functional.state_query.integer.max_combined_texture_image_units_getinteger

There was enough breakage that I figured we should just send this back
to the drawing board.

Revert "i965: don't include compute resources in "Combined" limits"
Revert "st/mesa: don't include compute resources in "Combined" limits"
Revert "mesa: don't include compute resources in MAX_COMBINED_* limits"

This reverts commit b03dcb1e5f507c5950d0de053a6f76e6306ee71f.
This reverts commit cff290df4c09547cd2cb3b129ec59bdebdadba90.
This reverts commit 45f87a48f94148b484961f18a4f1ccf86f066b1c.

diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 59871ed84e25536c6fc878f195472f96ec3fc0bb..6ba64e4e06d7f683c4a6ca91c62fa7ef98ce83ee 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -421,10 +421,10 @@ brw_initialize_context_constants(struct brw_context *brw)
           ctx->Const.MaxComputeWorkGroupSize[0] >= 128),
    };
 
-   unsigned num_gfx_stages = 0;
-   for (int i = 0; i < MESA_SHADER_COMPUTE; i++) {
+   unsigned num_stages = 0;
+   for (int i = 0; i < MESA_SHADER_STAGES; i++) {
       if (stage_exists[i])
-         num_gfx_stages++;
+         num_stages++;
    }
 
    unsigned max_samplers =
@@ -505,14 +505,14 @@ brw_initialize_context_constants(struct brw_context *brw)
       MIN2(ctx->Const.MaxTextureCoordUnits,
            ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits);
 
-   ctx->Const.MaxUniformBufferBindings = num_gfx_stages * BRW_MAX_UBO;
-   ctx->Const.MaxCombinedUniformBlocks = num_gfx_stages * BRW_MAX_UBO;
-   ctx->Const.MaxCombinedAtomicBuffers = num_gfx_stages * BRW_MAX_ABO;
-   ctx->Const.MaxCombinedShaderStorageBlocks = num_gfx_stages * BRW_MAX_SSBO;
-   ctx->Const.MaxCombinedTextureImageUnits = num_gfx_stages * max_samplers;
-   ctx->Const.MaxCombinedImageUniforms = num_gfx_stages * BRW_MAX_IMAGES;
-   ctx->Const.MaxShaderStorageBufferBindings =
-      (num_gfx_stages + stage_exists[MESA_SHADER_COMPUTE]) * BRW_MAX_SSBO;
+   ctx->Const.MaxUniformBufferBindings = num_stages * BRW_MAX_UBO;
+   ctx->Const.MaxCombinedUniformBlocks = num_stages * BRW_MAX_UBO;
+   ctx->Const.MaxCombinedAtomicBuffers = num_stages * BRW_MAX_ABO;
+   ctx->Const.MaxCombinedShaderStorageBlocks = num_stages * BRW_MAX_SSBO;
+   ctx->Const.MaxShaderStorageBufferBindings = num_stages * BRW_MAX_SSBO;
+   ctx->Const.MaxCombinedTextureImageUnits = num_stages * max_samplers;
+   ctx->Const.MaxCombinedImageUniforms = num_stages * BRW_MAX_IMAGES;
+
 
    /* Hardware only supports a limited number of transform feedback buffers.
     * So we need to override the Mesa default (which is based only on software

diff --git a/src/mesa/main/config.h b/src/mesa/main/config.h
index 19bc6b2457e247f45eafc0e7d88ac8ab7e58a939..6f5146500098577a1520d83e6ead14bbeb7004f8 100644 (file)
--- a/src/mesa/main/config.h
+++ b/src/mesa/main/config.h
@@ -173,19 +173,17 @@
 #define MAX_UNIFORMS                   4096
 #define MAX_UNIFORM_BUFFERS            15 /* + 1 default uniform buffer */
 #define MAX_SHADER_STORAGE_BUFFERS     16
-/* 5 is for vertex, hull, domain, geometry, and fragment shader. Don't
- * include compute.
- */
-#define MAX_COMBINED_UNIFORM_BUFFERS   (MAX_UNIFORM_BUFFERS * 5)
-#define MAX_COMBINED_SHADER_STORAGE_BUFFERS   (MAX_SHADER_STORAGE_BUFFERS * 5)
+/* 6 is for vertex, hull, domain, geometry, fragment, and compute shader. */
+#define MAX_COMBINED_UNIFORM_BUFFERS   (MAX_UNIFORM_BUFFERS * 6)
+#define MAX_COMBINED_SHADER_STORAGE_BUFFERS   (MAX_SHADER_STORAGE_BUFFERS * 6)
 #define MAX_ATOMIC_COUNTERS            4096
-/* 5 is for vertex, hull, domain, geometry, and fragment shader. */
-#define MAX_COMBINED_ATOMIC_BUFFERS    (MAX_UNIFORM_BUFFERS * 5)
+/* 6 is for vertex, hull, domain, geometry, fragment, and compute shader. */
+#define MAX_COMBINED_ATOMIC_BUFFERS    (MAX_UNIFORM_BUFFERS * 6)
 /* Size of an atomic counter in bytes according to ARB_shader_atomic_counters */
 #define ATOMIC_COUNTER_SIZE            4
 #define MAX_IMAGE_UNIFORMS             32
-/* 5 is for vertex, hull, domain, geometry, and fragment shader. */
-#define MAX_IMAGE_UNITS                (MAX_IMAGE_UNIFORMS * 5)
+/* 6 is for vertex, hull, domain, geometry, fragment, and compute shader. */
+#define MAX_IMAGE_UNITS                (MAX_IMAGE_UNIFORMS * 6)
 /*@}*/
 
 /**
@@ -224,10 +222,8 @@
 /** For GL_ARB_vertex_shader */
 /*@{*/
 #define MAX_VERTEX_GENERIC_ATTRIBS 16
-/* 5 is the number of shader stages that can be used at the same time.
- * compute can't be used at the same time as other shaders.
- */
-#define MAX_COMBINED_TEXTURE_IMAGE_UNITS (MAX_TEXTURE_IMAGE_UNITS * 5)
+/* 6 is for vertex, hull, domain, geometry, fragment, and compute shader. */
+#define MAX_COMBINED_TEXTURE_IMAGE_UNITS (MAX_TEXTURE_IMAGE_UNITS * 6)
 /*@}*/
 
 

diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa/state_tracker/st_extensions.c
index 2a1b2931d5a45ad2daef7422cdb241a9580b8f77..a63c58c8acb18f8ba065c7474f4b5c31ea2f183c 100644 (file)
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -337,7 +337,8 @@ void st_init_limits(struct pipe_screen *screen,
               c->Program[MESA_SHADER_TESS_CTRL].MaxTextureImageUnits +
               c->Program[MESA_SHADER_TESS_EVAL].MaxTextureImageUnits +
               c->Program[MESA_SHADER_GEOMETRY].MaxTextureImageUnits +
-              c->Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits,
+              c->Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits +
+              c->Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits,
               MAX_COMBINED_TEXTURE_IMAGE_UNITS);
 
    /* This depends on program constants. */
@@ -412,7 +413,8 @@ void st_init_limits(struct pipe_screen *screen,
          c->Program[MESA_SHADER_TESS_CTRL].MaxUniformBlocks +
          c->Program[MESA_SHADER_TESS_EVAL].MaxUniformBlocks +
          c->Program[MESA_SHADER_GEOMETRY].MaxUniformBlocks +
-         c->Program[MESA_SHADER_FRAGMENT].MaxUniformBlocks,
+         c->Program[MESA_SHADER_FRAGMENT].MaxUniformBlocks +
+         c->Program[MESA_SHADER_COMPUTE].MaxUniformBlocks;
       assert(c->MaxCombinedUniformBlocks <= MAX_COMBINED_UNIFORM_BUFFERS);
    }
 
@@ -478,7 +480,8 @@ void st_init_limits(struct pipe_screen *screen,
          c->Program[MESA_SHADER_TESS_CTRL].MaxImageUniforms +
          c->Program[MESA_SHADER_TESS_EVAL].MaxImageUniforms +
          c->Program[MESA_SHADER_GEOMETRY].MaxImageUniforms +
-         c->Program[MESA_SHADER_FRAGMENT].MaxImageUniforms;
+         c->Program[MESA_SHADER_FRAGMENT].MaxImageUniforms +
+         c->Program[MESA_SHADER_COMPUTE].MaxImageUniforms;
    c->MaxCombinedShaderOutputResources += c->MaxCombinedImageUniforms;
    c->MaxImageUnits = MAX_IMAGE_UNITS;
    if (c->MaxCombinedImageUniforms) {