vreinterpret.c: Fix typo in comment.

* gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Fix typo in comment.

From-SVN: r236382

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index a0c3dc3cb6763dafb5d133a5cd094567a6f4a1d6..1ed9a5ad2c6a12a613a6b8330768d03e000c2146 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-05-18  Christophe Lyon  <christophe.lyon@linaro.org>
+
+       * gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Fix typo
+       in comment.
+
 2016-05-18  Christophe Lyon  <christophe.lyon@linaro.org>
 
        * gcc.target/aarch64/noplt_3.c: Scan for "br\t".

diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c
index 9e45e25cc3a5fce11d0e02ba281c9b1244a445ef..d4e5768dec6bdf539db9b7cad752acda7180512b 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c
@@ -405,7 +405,7 @@ VECT_VAR_DECL(expected_q_f32_9,hfloat,32,4) [] = { 0xf3f2f1f0, 0xf7f6f5f4,
 VECT_VAR_DECL(expected_q_f32_10,hfloat,32,4) [] = { 0xfff1fff0, 0xfff3fff2,
                                                    0xfff5fff4, 0xfff7fff6 };
 
-/* Expected results for vreinterpretq_xx_f32.  */
+/* Expected results for vreinterpret_xx_f32.  */
 VECT_VAR_DECL(expected_xx_f32_1,int,8,8) [] = { 0x0, 0x0, 0x80, 0xc1,
                                                0x0, 0x0, 0x70, 0xc1 };
 VECT_VAR_DECL(expected_xx_f32_2,int,16,4) [] = { 0x0, 0xc180, 0x0, 0xc170 };