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Added English Language description for lfdu instruction
author
Shriya Sharma
<shriya@redsemiconductor.com>
Tue, 3 Oct 2023 10:26:57 +0000
(11:26 +0100)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Sun, 29 Oct 2023 08:54:37 +0000
(08:54 +0000)
openpower/isa/fpload.mdwn
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diff --git
a/openpower/isa/fpload.mdwn
b/openpower/isa/fpload.mdwn
index eb00e3b3e040f8ea3ebf1ad9ad43b93d5bb32241..d2dd27ab86656e08567cad6172678c00292bc4ff 100644
(file)
--- a/
openpower/isa/fpload.mdwn
+++ b/
openpower/isa/fpload.mdwn
@@
-163,6
+163,17
@@
Pseudo-code:
FRT <- MEM(EA, 8)
RA <- EA
+Description:
+
+ Let the effective address (EA) be the sum (RA)+D.
+
+ The doubleword in storage addressed by EA is loaded
+ into register FRT.
+
+ EA is placed into register RA.
+
+ If RA=0, the instruction form is invalid.
+
Special Registers Altered:
None