self.sync += delayed_instruction_valid.eq(fetch_action == `fetch_action_wait)
- fc = {}
- self.comb += Case(fetch_action, fc)
- fc[fetch_action_ack_trap] =
+ fc = {
+ fetch_action_ack_trap:
If(memory_interface_fetch_valid,
[fetch_pc.eq(fetch_pc + 4),
output_state.eq(fetch_output_state_valid)]
).Else(
[fetch_pc.eq(mtvec),
output_state.eq(fetch_output_state_trap)]
- )
- fc[fetch_action_default] = fc[fetch_action_ack_trap]
- fc[fetch_action_fence] =
+ ),
+ fetch_action_fence:
[ fetch_pc.eq(output_pc + 4),
- output_state.eq(fetch_output_state_empty)]
- fc[fetch_action_jump] =
+ output_state.eq(fetch_output_state_empty)],
+ fetch_action_jump:
[ fetch_pc.eq(target_pc),
- output_state.eq(fetch_output_state_empty)]
- fc[fetch_action_error_trap] =
+ output_state.eq(fetch_output_state_empty)],
+ fetch_action_error_trap,
[fetch_pc.eq(mtvec),
- output_state.eq(fetch_output_state_empty)]
- fc[fetch_action_noerror_trap] = fc[fetch_action_error_trap]
- fc[fetch_action_wait] =
+ output_state.eq(fetch_output_state_empty)],
+ fetch_action_wait:
[fetch_pc.eq(fetch_pc),
output_state.eq(fetch_output_state_valid)]
+ }
+ fc[fetch_action_default] = fc[fetch_action_ack_trap]
+ fc[fetch_action_noerror_trap] = fc[fetch_action_error_trap]
+ self.comb += Case(fetch_action, fc).makedefault(fetch_action_default)