* mips.h: Fix a typo in description.

diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index a454ad02bf8e647e340c1133a5cab0c1db68bd83..4b8d3002c1bb8bceecb84b293388639a07ff900d 100644 (file)
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+2012-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
+
+       * mips.h: Fix a typo in description.
+
 2012-06-07  Georg-Johann Lay  <avr@gjlay.de>
 
        * avr.h: (AVR_ISA_XCH): New define.

diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index fb9094c26f21479de2dfb4c6d1b92c77a75b7149..92325080be2a11dd4c2bc60595d79b1419485883 100644 (file)
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -1646,7 +1646,7 @@ extern const int bfd_mips16_num_opcodes;
    "y" 5-bit source 3 register for ALNV.PS (MICROMIPSOP_*_RS3)
    "z" must be zero register
    "C" 23-bit coprocessor function code (MICROMIPSOP_*_COPZ)
-   "B" 8-bit syscall/wait function code (MICROMIPSOP_*_CODE10)
+   "B" 10-bit syscall/wait function code (MICROMIPSOP_*_CODE10)
    "K" 5-bit Hardware Register (RDHWR instruction) (MICROMIPSOP_*_RS)
 
    "+A" 5-bit INS/EXT/DINS/DEXT/DINSM/DEXTM position, which becomes