* m68hc11-tdep.c (gdb_print_insn_m68hc11): Use info->arch

	instead of current_gdbarch.

	* sh64-tdep.c (gdb_print_insn_sh64): Remove.
	(sh64_gdbarch_init): Install print_insn_sh64 directly.
	* sh-tdep.c (gdb_print_insn_sh): Remove.
	(sh_gdbarch_init): Install print_insn_sh directly.

	* mips-tdep.c (gdb_print_insn_mips): Do not check mips_abi
	from current_gdbarch.
	(gdb_print_insn_mips_n32, gdb_print_insn_mips_n64): New functions.
	(mips_gdbarch_init): Install them instead of gdb_print_insn_mips
	depending on mips_abi.

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index a2ee6442d27ece04d0981956de2c13c35fd0e919..6bf0ea7646e90b01a371bff93b4550f8bc507fab 100644 (file)
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,19 @@
+2008-09-05  Ulrich Weigand  <uweigand@de.ibm.com>
+
+       * m68hc11-tdep.c (gdb_print_insn_m68hc11): Use info->arch
+       instead of current_gdbarch.
+
+       * sh64-tdep.c (gdb_print_insn_sh64): Remove.
+       (sh64_gdbarch_init): Install print_insn_sh64 directly.
+       * sh-tdep.c (gdb_print_insn_sh): Remove.
+       (sh_gdbarch_init): Install print_insn_sh directly.
+
+       * mips-tdep.c (gdb_print_insn_mips): Do not check mips_abi
+       from current_gdbarch.
+       (gdb_print_insn_mips_n32, gdb_print_insn_mips_n64): New functions.
+       (mips_gdbarch_init): Install them instead of gdb_print_insn_mips
+       depending on mips_abi.
+
 2008-09-05  Ulrich Weigand  <uweigand@de.ibm.com>
 
        * gdbarch.sh (addr_bits_remove): Change type to 'm'.

diff --git a/gdb/m68hc11-tdep.c b/gdb/m68hc11-tdep.c
index 16bb2436546c812d46e1e7043fa8582bb2c96203..7bd6e698ff3616793192485e9740146d229a0f47 100644 (file)
--- a/gdb/m68hc11-tdep.c
+++ b/gdb/m68hc11-tdep.c
@@ -1349,7 +1349,7 @@ m68hc11_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym)
 static int
 gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info)
 {
-  if (gdbarch_bfd_arch_info (current_gdbarch)->arch == bfd_arch_m68hc11)
+  if (info->arch == bfd_arch_m68hc11)
     return print_insn_m68hc11 (memaddr, info);
   else
     return print_insn_m68hc12 (memaddr, info);

diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index 4d908431edb955f9ae1894891a2499210a24212e..14e21fb4568fe1d34a7acac35f658fc38bc23d76 100644 (file)
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -4907,8 +4907,6 @@ reinit_frame_cache_sfunc (char *args, int from_tty,
 static int
 gdb_print_insn_mips (bfd_vma memaddr, struct disassemble_info *info)
 {
-  struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
-
   /* FIXME: cagney/2003-06-26: Is this even necessary?  The
      disassembler needs to be able to locally determine the ISA, and
      not rely on GDB.  Otherwize the stand-alone 'objdump -d' will not
@@ -4920,17 +4918,7 @@ gdb_print_insn_mips (bfd_vma memaddr, struct disassemble_info *info)
   memaddr &= (info->mach == bfd_mach_mips16 ? ~1 : ~3);
 
   /* Set the disassembler options.  */
-  if (tdep->mips_abi == MIPS_ABI_N32 || tdep->mips_abi == MIPS_ABI_N64)
-    {
-      /* Set up the disassembler info, so that we get the right
-         register names from libopcodes.  */
-      if (tdep->mips_abi == MIPS_ABI_N32)
-       info->disassembler_options = "gpr-names=n32";
-      else
-       info->disassembler_options = "gpr-names=64";
-      info->flavour = bfd_target_elf_flavour;
-    }
-  else
+  if (!info->disassembler_options)
     /* This string is not recognized explicitly by the disassembler,
        but it tells the disassembler to not try to guess the ABI from
        the bfd elf headers, such that, if the user overrides the ABI
@@ -4945,6 +4933,28 @@ gdb_print_insn_mips (bfd_vma memaddr, struct disassemble_info *info)
     return print_insn_little_mips (memaddr, info);
 }
 
+static int
+gdb_print_insn_mips_n32 (bfd_vma memaddr, struct disassemble_info *info)
+{
+  /* Set up the disassembler info, so that we get the right
+     register names from libopcodes.  */
+  info->disassembler_options = "gpr-names=n32";
+  info->flavour = bfd_target_elf_flavour;
+
+  return gdb_print_insn_mips (memaddr, info);
+}
+
+static int
+gdb_print_insn_mips_n64 (bfd_vma memaddr, struct disassemble_info *info)
+{
+  /* Set up the disassembler info, so that we get the right
+     register names from libopcodes.  */
+  info->disassembler_options = "gpr-names=64";
+  info->flavour = bfd_target_elf_flavour;
+
+  return gdb_print_insn_mips (memaddr, info);
+}
+
 /* This function implements gdbarch_breakpoint_from_pc.  It uses the program
    counter value to determine whether a 16- or 32-bit breakpoint should be used.
    It returns a pointer to a string of bytes that encode a breakpoint
@@ -5872,7 +5882,12 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 
   set_gdbarch_print_registers_info (gdbarch, mips_print_registers_info);
 
-  set_gdbarch_print_insn (gdbarch, gdb_print_insn_mips);
+  if (mips_abi == MIPS_ABI_N32)
+    set_gdbarch_print_insn (gdbarch, gdb_print_insn_mips_n32);
+  else if (mips_abi == MIPS_ABI_N64)
+    set_gdbarch_print_insn (gdbarch, gdb_print_insn_mips_n64);
+  else
+    set_gdbarch_print_insn (gdbarch, gdb_print_insn_mips);
 
   /* FIXME: cagney/2003-08-29: The macros HAVE_STEPPABLE_WATCHPOINT,
      HAVE_NONSTEPPABLE_WATCHPOINT, and HAVE_CONTINUABLE_WATCHPOINT

diff --git a/gdb/sh-tdep.c b/gdb/sh-tdep.c
index 911785a093426eba1b48537425c7dc3d2261a545..0c841d6f613cd30df2d4fc896ea5024d94d032a9 100644 (file)
--- a/gdb/sh-tdep.c
+++ b/gdb/sh-tdep.c
@@ -519,14 +519,6 @@ sh_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr)
 #define IS_ADD_REG_TO_FP(x)    (((x) & 0xff0f) == 0x3e0c)
 #define IS_ADD_IMM_FP(x)       (((x) & 0xff00) == 0x7e00)
 
-/* Disassemble an instruction.  */
-static int
-gdb_print_insn_sh (bfd_vma memaddr, disassemble_info * info)
-{
-  info->endian = gdbarch_byte_order (current_gdbarch);
-  return print_insn_sh (memaddr, info);
-}
-
 static CORE_ADDR
 sh_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
                     struct sh_frame_cache *cache, ULONGEST fpscr)
@@ -2815,7 +2807,7 @@ sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 
   set_gdbarch_breakpoint_from_pc (gdbarch, sh_breakpoint_from_pc);
 
-  set_gdbarch_print_insn (gdbarch, gdb_print_insn_sh);
+  set_gdbarch_print_insn (gdbarch, print_insn_sh);
   set_gdbarch_register_sim_regno (gdbarch, legacy_register_sim_regno);
 
   set_gdbarch_return_value (gdbarch, sh_return_value_nofpu);

diff --git a/gdb/sh64-tdep.c b/gdb/sh64-tdep.c
index 5456be70d0d2827159b4ac5117f03845fcdacebc..d8ab9399149ece7ebcb9599fc1bde968c486f60b 100644 (file)
--- a/gdb/sh64-tdep.c
+++ b/gdb/sh64-tdep.c
@@ -676,14 +676,6 @@ sh64_use_struct_convention (struct type *type)
   return (TYPE_LENGTH (type) > 8);
 }
 
-/* Disassemble an instruction.  */
-static int
-gdb_print_insn_sh64 (bfd_vma memaddr, disassemble_info *info)
-{
-  info->endian = gdbarch_byte_order (current_gdbarch);
-  return print_insn_sh (memaddr, info);
-}
-
 /* For vectors of 4 floating point registers.  */
 static int
 sh64_fv_reg_base_num (struct gdbarch *gdbarch, int fv_regnum)
@@ -2471,7 +2463,7 @@ sh64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 
   set_gdbarch_breakpoint_from_pc (gdbarch, sh64_breakpoint_from_pc);
 
-  set_gdbarch_print_insn (gdbarch, gdb_print_insn_sh64);
+  set_gdbarch_print_insn (gdbarch, print_insn_sh);
   set_gdbarch_register_sim_regno (gdbarch, legacy_register_sim_regno);
 
   set_gdbarch_return_value (gdbarch, sh64_return_value);