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Shortened code in case_addis_nonzero_r0 alu test case
author
R Veera Kumar
<vklr@vkten.in>
Thu, 25 Nov 2021 10:15:21 +0000
(15:45 +0530)
committer
R Veera Kumar
<vklr@vkten.in>
Thu, 25 Nov 2021 10:15:21 +0000
(15:45 +0530)
src/openpower/test/alu/alu_cases.py
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diff --git
a/src/openpower/test/alu/alu_cases.py
b/src/openpower/test/alu/alu_cases.py
index 5cb07aedbb305cd97c99406d609b3d757df90771..ca68fd2eaca60078674f009b0ee14c445747cd02 100644
(file)
--- a/
src/openpower/test/alu/alu_cases.py
+++ b/
src/openpower/test/alu/alu_cases.py
@@
-237,10
+237,7
@@
class ALUTestCase(TestAccumulatorBase):
initial_regs[0] = random.randint(0, (1 << 64)-1)
e = ExpectedState(pc=4)
e.intregs[0] = initial_regs[0]
- if imm < 0:
- e.intregs[3] = (imm + 2**48)<<16
- else:
- e.intregs[3] = imm << 16
+ e.intregs[3] = (imm << 16) & ((1<<64)-1)
self.add_case(Program(lst, bigendian), initial_regs, expected=e)
def case_rand_imm(self):