Move half precision instructions, add vfmsv, vfmvv

diff --git a/hwacha/decode_hwacha_ut.h b/hwacha/decode_hwacha_ut.h
index a07af8251f3a6c512a10bb9ef51ce49f1301e553..a9c069a45275c832212d583e72762ac9445da99b 100644 (file)
--- a/hwacha/decode_hwacha_ut.h
+++ b/hwacha/decode_hwacha_ut.h
@@ -77,4 +77,14 @@ static inline void write_frd(hwacha_t* h, insn_t insn, uint32_t idx, reg_t value
 #undef require_fp
 #define require_fp
 
+#include "cvt16.h"
+
+#define HFRS1 cvt_hs(FRS1)
+#define HFRS2 cvt_hs(FRS2)
+#define HFRS3 cvt_hs(FRS3)
+
+#define WRITE_HFRD(value) write_frd(h, insn, UTIDX, cvt_sh(value, RM))
+
+#define sext16(x) ((sreg_t)(int16_t)(x))
+
 #endif

diff --git a/hwacha/decode_hwacha_ut_half.h b/hwacha/decode_hwacha_ut_half.h
deleted file mode 100644 (file)
index b4bff21..0000000
--- a/hwacha/decode_hwacha_ut_half.h
+++ /dev/null
@@ -1,15 +0,0 @@
-#ifndef _DECODE_HWACHA_UT_HALF_H
-#define _DECODE_HWACHA_UT_HALF_H
-
-#include "decode_hwacha_ut.h"
-#include "cvt16.h"
-
-#define HFRS1 cvt_hs(FRS1)
-#define HFRS2 cvt_hs(FRS2)
-#define HFRS3 cvt_hs(FRS3)
-
-#define WRITE_HFRD(value) write_frd(h, insn, UTIDX, cvt_sh(value, RM))
-
-#define sext16(x) ((sreg_t)(int16_t)(x))
-
-#endif

diff --git a/hwacha/encodings_hwacha.h b/hwacha/encodings_hwacha.h
new file mode 100644 (file)
index 0000000..2be35eb
--- /dev/null
+++ b/hwacha/encodings_hwacha.h
@@ -0,0 +1,165 @@
+#ifndef ENCODINGS_HWACHA
+#define ENCODINGS_HWACHA
+
+#define MATCH_FCVT_H_LU 0x6c000053
+#define MASK_FCVT_H_LU  0xfff0007f
+#define MATCH_FMIN_H 0xc4000053
+#define MASK_FMIN_H  0xfe00707f
+#define MATCH_FCVT_WU_H 0x5c000053
+#define MASK_FCVT_WU_H  0xfff0007f
+#define MATCH_FDIV_H 0x1c000053
+#define MASK_FDIV_H  0xfe00007f
+#define MATCH_FCVT_H_WU 0x7c000053
+#define MASK_FCVT_H_WU  0xfff0007f
+#define MATCH_FSGNJ_H 0x2c000053
+#define MASK_FSGNJ_H  0xfe00707f
+#define MATCH_FNMSUB_H 0x400004b
+#define MASK_FNMSUB_H  0x600007f
+#define MATCH_FLE_H 0xbc000053
+#define MASK_FLE_H  0xfe00707f
+#define MATCH_FCVT_L_H 0x44000053
+#define MASK_FCVT_L_H  0xfff0007f
+#define MATCH_FNMADD_H 0x400004f
+#define MASK_FNMADD_H  0x600007f
+#define MATCH_FCVT_H_S 0x90000053
+#define MASK_FCVT_H_S  0xfff0007f
+#define MATCH_FCVT_H_W 0x74000053
+#define MASK_FCVT_H_W  0xfff0007f
+#define MATCH_FCVT_D_H 0x8c000053
+#define MASK_FCVT_D_H  0xfff0007f
+#define MATCH_FMAX_H 0xcc000053
+#define MASK_FMAX_H  0xfe00707f
+#define MATCH_FCVT_LU_H 0x4c000053
+#define MASK_FCVT_LU_H  0xfff0007f
+#define MATCH_FCVT_H_L 0x64000053
+#define MASK_FCVT_H_L  0xfff0007f
+#define MATCH_FMV_X_H 0xe4000053
+#define MASK_FMV_X_H  0xfff0707f
+#define MATCH_FCVT_H_D 0x92000053
+#define MASK_FCVT_H_D  0xfff0007f
+#define MATCH_FLT_H 0xb4000053
+#define MASK_FLT_H  0xfe00707f
+#define MATCH_FADD_H 0x4000053
+#define MASK_FADD_H  0xfe00007f
+#define MATCH_FCVT_S_H 0x84000053
+#define MASK_FCVT_S_H  0xfff0007f
+#define MATCH_FCVT_W_H 0x54000053
+#define MASK_FCVT_W_H  0xfff0007f
+#define MATCH_FMUL_H 0x14000053
+#define MASK_FMUL_H  0xfe00007f
+#define MATCH_FMADD_H 0x4000043
+#define MASK_FMADD_H  0x600007f
+#define MATCH_FSQRT_H 0x24000053
+#define MASK_FSQRT_H  0xfff0007f
+#define MATCH_FSGNJN_H 0x34000053
+#define MASK_FSGNJN_H  0xfe00707f
+#define MATCH_FSUB_H 0xc000053
+#define MASK_FSUB_H  0xfe00007f
+#define MATCH_FSH 0x1027
+#define MASK_FSH  0x707f
+#define MATCH_FSGNJX_H 0x3c000053
+#define MASK_FSGNJX_H  0xfe00707f
+#define MATCH_FLH 0x1007
+#define MASK_FLH  0x707f
+#define MATCH_FMSUB_H 0x4000047
+#define MASK_FMSUB_H  0x600007f
+#define MATCH_FEQ_H 0xac000053
+#define MASK_FEQ_H  0xfe00707f
+#define MATCH_FMV_H_X 0xf4000053
+#define MASK_FMV_H_X  0xfff0707f
+
+#define MASK_VF  0x1f0707f
+#define MASK_VFLSEGD  0x1ff0707f
+#define MASK_VFLSEGSTD  0x1e00707f
+#define MASK_VFLSEGSTW  0x1e00707f
+#define MASK_VFLSEGW  0x1ff0707f
+#define MASK_VFMSV  0xfff0707f
+#define MASK_VFMVV  0xfff0707f
+#define MASK_VFSSEGD  0x1ff0707f
+#define MASK_VFSSEGSTD  0x1e00707f
+#define MASK_VFSSEGSTW  0x1e00707f
+#define MASK_VFSSEGW  0x1ff0707f
+#define MASK_VGETCFG  0xfffff07f
+#define MASK_VGETVL  0xfffff07f
+#define MASK_VLSEGB  0x1ff0707f
+#define MASK_VLSEGBU  0x1ff0707f
+#define MASK_VLSEGD  0x1ff0707f
+#define MASK_VLSEGH  0x1ff0707f
+#define MASK_VLSEGHU  0x1ff0707f
+#define MASK_VLSEGSTB  0x1e00707f
+#define MASK_VLSEGSTBU  0x1e00707f
+#define MASK_VLSEGSTD  0x1e00707f
+#define MASK_VLSEGSTH  0x1e00707f
+#define MASK_VLSEGSTHU  0x1e00707f
+#define MASK_VLSEGSTW  0x1e00707f
+#define MASK_VLSEGSTWU  0x1e00707f
+#define MASK_VLSEGW  0x1ff0707f
+#define MASK_VLSEGWU  0x1ff0707f
+#define MASK_VMSV  0xfff0707f
+#define MASK_VMVV  0xfff0707f
+#define MASK_VSETCFG  0x7fff
+#define MASK_VSETVL  0xfff0707f
+#define MASK_VSSEGB  0x1ff0707f
+#define MASK_VSSEGD  0x1ff0707f
+#define MASK_VSSEGH  0x1ff0707f
+#define MASK_VSSEGSTB  0x1e00707f
+#define MASK_VSSEGSTD  0x1e00707f
+#define MASK_VSSEGSTH  0x1e00707f
+#define MASK_VSSEGSTW  0x1e00707f
+#define MASK_VSSEGW  0x1ff0707f
+#define MASK_VXCPTAUX  0xfffff07f
+#define MASK_VXCPTCAUSE  0xfffff07f
+#define MASK_VXCPTEVAC  0xfff07fff
+#define MASK_VXCPTHOLD  0xffffffff
+#define MASK_VXCPTKILL  0xffffffff
+#define MASK_VXCPTRESTORE  0xfff07fff
+#define MASK_VXCPTSAVE  0xfff07fff
+
+#define MATCH_VF 0x10202b
+#define MATCH_VFLSEGD 0x1600205b
+#define MATCH_VFLSEGSTD 0x1600305b
+#define MATCH_VFLSEGSTW 0x1400305b
+#define MATCH_VFLSEGW 0x1400205b
+#define MATCH_VFMSV 0x1200202b
+#define MATCH_VFMVV 0x1200002b
+#define MATCH_VFSSEGD 0x1600207b
+#define MATCH_VFSSEGSTD 0x1600307b
+#define MATCH_VFSSEGSTW 0x1400307b
+#define MATCH_VFSSEGW 0x1400207b
+#define MATCH_VGETCFG 0x400b
+#define MATCH_VGETVL 0x200400b
+#define MATCH_VLSEGB 0x205b
+#define MATCH_VLSEGBU 0x800205b
+#define MATCH_VLSEGD 0x600205b
+#define MATCH_VLSEGH 0x200205b
+#define MATCH_VLSEGHU 0xa00205b
+#define MATCH_VLSEGSTB 0x305b
+#define MATCH_VLSEGSTBU 0x800305b
+#define MATCH_VLSEGSTD 0x600305b
+#define MATCH_VLSEGSTH 0x200305b
+#define MATCH_VLSEGSTHU 0xa00305b
+#define MATCH_VLSEGSTW 0x400305b
+#define MATCH_VLSEGSTWU 0xc00305b
+#define MATCH_VLSEGW 0x400205b
+#define MATCH_VLSEGWU 0xc00205b
+#define MATCH_VMSV 0x200202b
+#define MATCH_VMVV 0x200002b
+#define MATCH_VSETCFG 0x200b
+#define MATCH_VSETVL 0x600b
+#define MATCH_VSSEGB 0x207b
+#define MATCH_VSSEGD 0x600207b
+#define MATCH_VSSEGH 0x200207b
+#define MATCH_VSSEGSTB 0x307b
+#define MATCH_VSSEGSTD 0x600307b
+#define MATCH_VSSEGSTH 0x200307b
+#define MATCH_VSSEGSTW 0x400307b
+#define MATCH_VSSEGW 0x400207b
+#define MATCH_VXCPTAUX 0x200402b
+#define MATCH_VXCPTCAUSE 0x402b
+#define MATCH_VXCPTEVAC 0x600302b
+#define MATCH_VXCPTHOLD 0x800302b
+#define MATCH_VXCPTKILL 0x400302b
+#define MATCH_VXCPTRESTORE 0x200302b
+#define MATCH_VXCPTSAVE 0x302b
+
+#endif /* ENCODINGS_HWACHA */

diff --git a/hwacha/hwacha.mk.in b/hwacha/hwacha.mk.in
index de99f501933b372c31d0675286e28f907ce25562..1be27740c97369c0f138e2b029e950f38abd8fe6 100644 (file)
--- a/hwacha/hwacha.mk.in
+++ b/hwacha/hwacha.mk.in
@@ -9,10 +9,8 @@ hwacha_hdrs = \
        hwacha_xcpt.h \
        decode_hwacha.h \
        decode_hwacha_ut.h \
-       decode_hwacha_ut_half.h \
        opcodes_hwacha.h \
        opcodes_hwacha_ut.h \
-       opcodes_hwacha_ut_half.h \
 
 hwacha_srcs = \
        hwacha.cc \
@@ -20,7 +18,6 @@ hwacha_srcs = \
        cvt16.cc \
        $(hwacha_gen_srcs) \
        $(hwacha_ut_gen_srcs) \
-       $(hwacha_ut_half_gen_srcs) \
 
 hwacha_test_srcs =
 
@@ -36,8 +33,3 @@ hwacha_ut_gen_srcs = \
 $(hwacha_ut_gen_srcs): %.cc: insns_ut/%.h insn_template_hwacha_ut.cc
        sed 's/NAME/$(subst .cc,,$@)/' $(src_dir)/hwacha/insn_template_hwacha_ut.cc | sed 's/OPCODE/$(call get_opcode,$(src_dir)/hwacha/opcodes_hwacha_ut.h,$(subst .cc,,$@))/' > $@
 
-hwacha_ut_half_gen_srcs = \
-       $(addsuffix .cc, $(call get_insn_list,$(src_dir)/hwacha/opcodes_hwacha_ut_half.h))
-
-$(hwacha_ut_half_gen_srcs): %.cc: insns_ut_half/%.h insn_template_hwacha_ut_half.cc
-       sed 's/NAME/$(subst .cc,,$@)/' $(src_dir)/hwacha/insn_template_hwacha_ut_half.cc | sed 's/OPCODE/$(call get_opcode,$(src_dir)/hwacha/opcodes_hwacha_ut_half.h,$(subst .cc,,$@))/' > $@

diff --git a/hwacha/hwacha_disasm.cc b/hwacha/hwacha_disasm.cc
index 46ec080ce5024631993fac317786e9375ddd0132..6d3f13ffe9a00b70e6c7eab95054a9558737e55e 100644 (file)
--- a/hwacha/hwacha_disasm.cc
+++ b/hwacha/hwacha_disasm.cc
@@ -132,6 +132,8 @@ std::vector<disasm_insn_t*> hwacha_t::get_disasms()
 
   DISASM_INSN("vmvv", vmvv, 0, {&vxrd, &vxrs1});
   DISASM_INSN("vmsv", vmsv, 0, {&vxrd, &xrs1});
+  DISASM_INSN("vfmvv", vfmvv, 0, {&vfrd, &vfrs1});
+  DISASM_INSN("vfmsv", vfmsv, 0, {&vfrd, &xrs1});
   DISASM_INSN("vf", vf, 0, {&vf_addr});
 
   DISASM_INSN("vxcptcause", vxcptcause, 0, {&xrd});

diff --git a/hwacha/insn_template_hwacha.cc b/hwacha/insn_template_hwacha.cc
index 6a1a51a1bc128a030ca8276dc30b715925084e81..e6f94d4cc4b36ffc0531df6d2a3bd9e2cdcb2e5b 100644 (file)
--- a/hwacha/insn_template_hwacha.cc
+++ b/hwacha/insn_template_hwacha.cc
@@ -5,6 +5,7 @@
 #include "mmu.h"
 #include "hwacha.h"
 #include "decode_hwacha.h"
+#include "encodings_hwacha.h"
 #include "rocc.h"
 #include <assert.h>
 

diff --git a/hwacha/insn_template_hwacha_ut_half.cc b/hwacha/insn_template_hwacha_ut_half.cc
deleted file mode 100644 (file)
index 12a0fb2..0000000
--- a/hwacha/insn_template_hwacha_ut_half.cc
+++ /dev/null
@@ -1,25 +0,0 @@
-// See LICENSE for license details.
-
-#include "config.h"
-#include "processor.h"
-#include "mmu.h"
-#include "softfloat.h"
-#include "platform.h" // softfloat isNaNF32UI, etc.
-#include "internals.h" // ditto
-#include "hwacha.h"
-#include "decode_hwacha_ut_half.h"
-#include "cvt16.h"
-#include <assert.h>
-
-reg_t hwacha_NAME(processor_t* p, insn_t insn, reg_t pc)
-{
-  int xprlen = 64;
-  reg_t npc = sext_xprlen(pc + insn_length(OPCODE));
-  hwacha_t* h = static_cast<hwacha_t*>(p->get_extension());
-  do {
-    #include "insns_ut_half/NAME.h"
-    WRITE_UTIDX(UTIDX+1);
-  } while (UTIDX < VL);
-  WRITE_UTIDX(0);
-  return npc;
-}

diff --git a/hwacha/insns/vf.h b/hwacha/insns/vf.h
index 7999428d63589e8018e621a035a3bd57700346fd..fafb8b913de75927d18a07c4e09317c40cad2550 100644 (file)
--- a/hwacha/insns/vf.h
+++ b/hwacha/insns/vf.h
@@ -21,7 +21,6 @@ vf_loop:
       matched = true; \
     }
   #include "opcodes_hwacha_ut.h"
-  #include "opcodes_hwacha_ut_half.h"
   #undef DECLARE_INSN
 
   if (!matched)

diff --git a/hwacha/insns/vfmsv.h b/hwacha/insns/vfmsv.h
new file mode 100644 (file)
index 0000000..d1df3a1
--- /dev/null
+++ b/hwacha/insns/vfmsv.h
@@ -0,0 +1,3 @@
+for (uint32_t i=0; i<VL; i++) {
+  UT_WRITE_FRD(i, XS1);
+}

diff --git a/hwacha/insns/vfmvv.h b/hwacha/insns/vfmvv.h
new file mode 100644 (file)
index 0000000..c7f194d
--- /dev/null
+++ b/hwacha/insns/vfmvv.h
@@ -0,0 +1,3 @@
+for (uint32_t i=0; i<VL; i++) {
+  UT_WRITE_FRD(i, UT_FRS1(i));
+}

diff --git a/hwacha/insns/vsetprec.h b/hwacha/insns/vsetprec.h
deleted file mode 100644 (file)
index 1588de6..0000000
--- a/hwacha/insns/vsetprec.h
+++ /dev/null
@@ -1,12 +0,0 @@
-uint32_t prec = u.r.funct;
-switch (prec) {
-  case 16:
-  case 32:
-  case 64:
-    WRITE_PREC(prec);
-    break;
-
-  default:
-    h->take_exception(HWACHA_CAUSE_ILLEGAL_CFG, 2);
-    break;
-}

diff --git a/hwacha/insns/vsetucfg.h b/hwacha/insns/vsetucfg.h
new file mode 100644 (file)
index 0000000..c7b5264
--- /dev/null
+++ b/hwacha/insns/vsetucfg.h
@@ -0,0 +1 @@
+WRITE_RD(insn.u_imm());

diff --git a/hwacha/insns_ut/ut_fadd_h.h b/hwacha/insns_ut/ut_fadd_h.h
new file mode 100644 (file)
index 0000000..8192562
--- /dev/null
+++ b/hwacha/insns_ut/ut_fadd_h.h
@@ -0,0 +1,4 @@
+require_fp;
+softfloat_roundingMode = RM;
+WRITE_HFRD(f32_mulAdd(HFRS1, 0x3f800000, HFRS2));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fcvt_d_h.h b/hwacha/insns_ut/ut_fcvt_d_h.h
new file mode 100644 (file)
index 0000000..9251ae9
--- /dev/null
+++ b/hwacha/insns_ut/ut_fcvt_d_h.h
@@ -0,0 +1,4 @@
+require_fp;
+softfloat_roundingMode = RM;
+WRITE_FRD(f32_to_f64(HFRS1));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fcvt_h_d.h b/hwacha/insns_ut/ut_fcvt_h_d.h
new file mode 100644 (file)
index 0000000..89dc473
--- /dev/null
+++ b/hwacha/insns_ut/ut_fcvt_h_d.h
@@ -0,0 +1,4 @@
+require_fp;
+softfloat_roundingMode = RM;
+WRITE_HFRD(f64_to_f32(FRS1));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fcvt_h_l.h b/hwacha/insns_ut/ut_fcvt_h_l.h
new file mode 100644 (file)
index 0000000..fe75c27
--- /dev/null
+++ b/hwacha/insns_ut/ut_fcvt_h_l.h
@@ -0,0 +1,5 @@
+require_xpr64;
+require_fp;
+softfloat_roundingMode = RM;
+WRITE_HFRD(i64_to_f32(RS1));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fcvt_h_lu.h b/hwacha/insns_ut/ut_fcvt_h_lu.h
new file mode 100644 (file)
index 0000000..38fc8a7
--- /dev/null
+++ b/hwacha/insns_ut/ut_fcvt_h_lu.h
@@ -0,0 +1,5 @@
+require_xpr64;
+require_fp;
+softfloat_roundingMode = RM;
+WRITE_HFRD(ui64_to_f32(RS1));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fcvt_h_s.h b/hwacha/insns_ut/ut_fcvt_h_s.h
new file mode 100644 (file)
index 0000000..ee49e1b
--- /dev/null
+++ b/hwacha/insns_ut/ut_fcvt_h_s.h
@@ -0,0 +1,3 @@
+require_fp;
+WRITE_FRD(cvt_sh(FRS1, RM));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fcvt_h_w.h b/hwacha/insns_ut/ut_fcvt_h_w.h
new file mode 100644 (file)
index 0000000..383a3c0
--- /dev/null
+++ b/hwacha/insns_ut/ut_fcvt_h_w.h
@@ -0,0 +1,4 @@
+require_fp;
+softfloat_roundingMode = RM;
+WRITE_HFRD(i32_to_f32((int32_t)RS1));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fcvt_h_wu.h b/hwacha/insns_ut/ut_fcvt_h_wu.h
new file mode 100644 (file)
index 0000000..228b25a
--- /dev/null
+++ b/hwacha/insns_ut/ut_fcvt_h_wu.h
@@ -0,0 +1,4 @@
+require_fp;
+softfloat_roundingMode = RM;
+WRITE_HFRD(ui32_to_f32((uint32_t)RS1));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fcvt_l_h.h b/hwacha/insns_ut/ut_fcvt_l_h.h
new file mode 100644 (file)
index 0000000..1551ce2
--- /dev/null
+++ b/hwacha/insns_ut/ut_fcvt_l_h.h
@@ -0,0 +1,5 @@
+require_xpr64;
+require_fp;
+softfloat_roundingMode = RM;
+WRITE_RD(f32_to_i64(HFRS1, RM, true));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fcvt_lu_h.h b/hwacha/insns_ut/ut_fcvt_lu_h.h
new file mode 100644 (file)
index 0000000..b2fc5fd
--- /dev/null
+++ b/hwacha/insns_ut/ut_fcvt_lu_h.h
@@ -0,0 +1,5 @@
+require_xpr64;
+require_fp;
+softfloat_roundingMode = RM;
+WRITE_RD(f32_to_ui64(HFRS1, RM, true));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fcvt_s_h.h b/hwacha/insns_ut/ut_fcvt_s_h.h
new file mode 100644 (file)
index 0000000..f779da8
--- /dev/null
+++ b/hwacha/insns_ut/ut_fcvt_s_h.h
@@ -0,0 +1,3 @@
+require_fp;
+WRITE_FRD(HFRS1);
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fcvt_w_h.h b/hwacha/insns_ut/ut_fcvt_w_h.h
new file mode 100644 (file)
index 0000000..5a2f084
--- /dev/null
+++ b/hwacha/insns_ut/ut_fcvt_w_h.h
@@ -0,0 +1,4 @@
+require_fp;
+softfloat_roundingMode = RM;
+WRITE_RD(sext32(f32_to_i32(HFRS1, RM, true)));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fcvt_wu_h.h b/hwacha/insns_ut/ut_fcvt_wu_h.h
new file mode 100644 (file)
index 0000000..537f50a
--- /dev/null
+++ b/hwacha/insns_ut/ut_fcvt_wu_h.h
@@ -0,0 +1,4 @@
+require_fp;
+softfloat_roundingMode = RM;
+WRITE_RD(sext32(f32_to_ui32(HFRS1, RM, true)));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fdiv_h.h b/hwacha/insns_ut/ut_fdiv_h.h
new file mode 100644 (file)
index 0000000..924b0c7
--- /dev/null
+++ b/hwacha/insns_ut/ut_fdiv_h.h
@@ -0,0 +1,4 @@
+require_fp;
+softfloat_roundingMode = RM;
+WRITE_HFRD(f32_div(HFRS1, HFRS2));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_feq_h.h b/hwacha/insns_ut/ut_feq_h.h
new file mode 100644 (file)
index 0000000..a6b4707
--- /dev/null
+++ b/hwacha/insns_ut/ut_feq_h.h
@@ -0,0 +1,3 @@
+require_fp;
+WRITE_RD(f32_eq(HFRS1, HFRS2));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fle_h.h b/hwacha/insns_ut/ut_fle_h.h
new file mode 100644 (file)
index 0000000..2c17204
--- /dev/null
+++ b/hwacha/insns_ut/ut_fle_h.h
@@ -0,0 +1,3 @@
+require_fp;
+WRITE_RD(f32_le(HFRS1, HFRS2));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_flh.h b/hwacha/insns_ut/ut_flh.h
new file mode 100644 (file)
index 0000000..90872ed
--- /dev/null
+++ b/hwacha/insns_ut/ut_flh.h
@@ -0,0 +1,2 @@
+require_fp;
+WRITE_FRD(MMU.load_int16(RS1 + insn.i_imm()));

diff --git a/hwacha/insns_ut/ut_flt_h.h b/hwacha/insns_ut/ut_flt_h.h
new file mode 100644 (file)
index 0000000..39a0393
--- /dev/null
+++ b/hwacha/insns_ut/ut_flt_h.h
@@ -0,0 +1,3 @@
+require_fp;
+WRITE_RD(f32_lt(HFRS1, HFRS2));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fmadd_h.h b/hwacha/insns_ut/ut_fmadd_h.h
new file mode 100644 (file)
index 0000000..cfbd82e
--- /dev/null
+++ b/hwacha/insns_ut/ut_fmadd_h.h
@@ -0,0 +1,4 @@
+require_fp;
+softfloat_roundingMode = RM;
+WRITE_HFRD(f32_mulAdd(HFRS1, HFRS2, HFRS3));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fmax_h.h b/hwacha/insns_ut/ut_fmax_h.h
new file mode 100644 (file)
index 0000000..32d3aa6
--- /dev/null
+++ b/hwacha/insns_ut/ut_fmax_h.h
@@ -0,0 +1,4 @@
+require_fp;
+WRITE_HFRD(isNaNF32UI(HFRS2) || f32_le_quiet(HFRS2,HFRS1) /* && FRS1 not NaN */
+      ? HFRS1 : HFRS2);
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fmin_h.h b/hwacha/insns_ut/ut_fmin_h.h
new file mode 100644 (file)
index 0000000..a6a7cc3
--- /dev/null
+++ b/hwacha/insns_ut/ut_fmin_h.h
@@ -0,0 +1,4 @@
+require_fp;
+WRITE_HFRD(isNaNF32UI(HFRS2) || f32_lt_quiet(HFRS1,HFRS2) /* && FRS1 not NaN */
+      ? HFRS1 : HFRS2);
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fmsub_h.h b/hwacha/insns_ut/ut_fmsub_h.h
new file mode 100644 (file)
index 0000000..323a8d0
--- /dev/null
+++ b/hwacha/insns_ut/ut_fmsub_h.h
@@ -0,0 +1,4 @@
+require_fp;
+softfloat_roundingMode = RM;
+WRITE_HFRD(f32_mulAdd(HFRS1, HFRS2, HFRS3 ^ (uint32_t)INT32_MIN));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fmul_h.h b/hwacha/insns_ut/ut_fmul_h.h
new file mode 100644 (file)
index 0000000..669dd0e
--- /dev/null
+++ b/hwacha/insns_ut/ut_fmul_h.h
@@ -0,0 +1,4 @@
+require_fp;
+softfloat_roundingMode = RM;
+WRITE_HFRD(f32_mulAdd(HFRS1, HFRS2, (HFRS1 ^ HFRS2) & (uint32_t)INT32_MIN));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fmv_h_x.h b/hwacha/insns_ut/ut_fmv_h_x.h
new file mode 100644 (file)
index 0000000..f3eac82
--- /dev/null
+++ b/hwacha/insns_ut/ut_fmv_h_x.h
@@ -0,0 +1,2 @@
+require_fp;
+WRITE_FRD(RS1);

diff --git a/hwacha/insns_ut/ut_fmv_x_h.h b/hwacha/insns_ut/ut_fmv_x_h.h
new file mode 100644 (file)
index 0000000..d0a84bc
--- /dev/null
+++ b/hwacha/insns_ut/ut_fmv_x_h.h
@@ -0,0 +1,2 @@
+require_fp;
+WRITE_RD(sext16(FRS1));

diff --git a/hwacha/insns_ut/ut_fnmadd_h.h b/hwacha/insns_ut/ut_fnmadd_h.h
new file mode 100644 (file)
index 0000000..f17cd8e
--- /dev/null
+++ b/hwacha/insns_ut/ut_fnmadd_h.h
@@ -0,0 +1,4 @@
+require_fp;
+softfloat_roundingMode = RM;
+WRITE_HFRD(f32_mulAdd(HFRS1 ^ (uint32_t)INT32_MIN, HFRS2, HFRS3 ^ (uint32_t)INT32_MIN));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fnmsub_h.h b/hwacha/insns_ut/ut_fnmsub_h.h
new file mode 100644 (file)
index 0000000..9a3161a
--- /dev/null
+++ b/hwacha/insns_ut/ut_fnmsub_h.h
@@ -0,0 +1,4 @@
+require_fp;
+softfloat_roundingMode = RM;
+WRITE_HFRD(f32_mulAdd(HFRS1 ^ (uint32_t)INT32_MIN, HFRS2, HFRS3));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fsgnj_h.h b/hwacha/insns_ut/ut_fsgnj_h.h
new file mode 100644 (file)
index 0000000..152d02b
--- /dev/null
+++ b/hwacha/insns_ut/ut_fsgnj_h.h
@@ -0,0 +1,2 @@
+require_fp;
+WRITE_FRD((FRS1 &~ (uint16_t)INT16_MIN) | (FRS2 & (uint16_t)INT16_MIN));

diff --git a/hwacha/insns_ut/ut_fsgnjn_h.h b/hwacha/insns_ut/ut_fsgnjn_h.h
new file mode 100644 (file)
index 0000000..b098150
--- /dev/null
+++ b/hwacha/insns_ut/ut_fsgnjn_h.h
@@ -0,0 +1,2 @@
+require_fp;
+WRITE_FRD((FRS1 &~ (uint32_t)INT32_MIN) | ((~FRS2) & (uint32_t)INT32_MIN));

diff --git a/hwacha/insns_ut/ut_fsgnjx_h.h b/hwacha/insns_ut/ut_fsgnjx_h.h
new file mode 100644 (file)
index 0000000..2b6d7ac
--- /dev/null
+++ b/hwacha/insns_ut/ut_fsgnjx_h.h
@@ -0,0 +1,2 @@
+require_fp;
+WRITE_FRD(FRS1 ^ (FRS2 & (uint16_t)INT16_MIN));

diff --git a/hwacha/insns_ut/ut_fsh.h b/hwacha/insns_ut/ut_fsh.h
new file mode 100644 (file)
index 0000000..945d3e3
--- /dev/null
+++ b/hwacha/insns_ut/ut_fsh.h
@@ -0,0 +1,2 @@
+require_fp;
+MMU.store_uint16(RS1 + insn.s_imm(), FRS2);

diff --git a/hwacha/insns_ut/ut_fsqrt_h.h b/hwacha/insns_ut/ut_fsqrt_h.h
new file mode 100644 (file)
index 0000000..f8b83fb
--- /dev/null
+++ b/hwacha/insns_ut/ut_fsqrt_h.h
@@ -0,0 +1,4 @@
+require_fp;
+softfloat_roundingMode = RM;
+WRITE_HFRD(f32_sqrt(HFRS1));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut/ut_fsub_h.h b/hwacha/insns_ut/ut_fsub_h.h
new file mode 100644 (file)
index 0000000..39cebbe
--- /dev/null
+++ b/hwacha/insns_ut/ut_fsub_h.h
@@ -0,0 +1,4 @@
+require_fp;
+softfloat_roundingMode = RM;
+WRITE_HFRD(f32_mulAdd(HFRS1, 0x3f800000, HFRS2 ^ (uint32_t)INT32_MIN));
+set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fadd_h.h b/hwacha/insns_ut_half/ut_fadd_h.h
deleted file mode 100644 (file)
index 8192562..0000000
--- a/hwacha/insns_ut_half/ut_fadd_h.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_fp;
-softfloat_roundingMode = RM;
-WRITE_HFRD(f32_mulAdd(HFRS1, 0x3f800000, HFRS2));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fcvt_d_h.h b/hwacha/insns_ut_half/ut_fcvt_d_h.h
deleted file mode 100644 (file)
index 9251ae9..0000000
--- a/hwacha/insns_ut_half/ut_fcvt_d_h.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_fp;
-softfloat_roundingMode = RM;
-WRITE_FRD(f32_to_f64(HFRS1));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fcvt_h_d.h b/hwacha/insns_ut_half/ut_fcvt_h_d.h
deleted file mode 100644 (file)
index 89dc473..0000000
--- a/hwacha/insns_ut_half/ut_fcvt_h_d.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_fp;
-softfloat_roundingMode = RM;
-WRITE_HFRD(f64_to_f32(FRS1));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fcvt_h_l.h b/hwacha/insns_ut_half/ut_fcvt_h_l.h
deleted file mode 100644 (file)
index fe75c27..0000000
--- a/hwacha/insns_ut_half/ut_fcvt_h_l.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_xpr64;
-require_fp;
-softfloat_roundingMode = RM;
-WRITE_HFRD(i64_to_f32(RS1));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fcvt_h_lu.h b/hwacha/insns_ut_half/ut_fcvt_h_lu.h
deleted file mode 100644 (file)
index 38fc8a7..0000000
--- a/hwacha/insns_ut_half/ut_fcvt_h_lu.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_xpr64;
-require_fp;
-softfloat_roundingMode = RM;
-WRITE_HFRD(ui64_to_f32(RS1));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fcvt_h_s.h b/hwacha/insns_ut_half/ut_fcvt_h_s.h
deleted file mode 100644 (file)
index ee49e1b..0000000
--- a/hwacha/insns_ut_half/ut_fcvt_h_s.h
+++ /dev/null
@@ -1,3 +0,0 @@
-require_fp;
-WRITE_FRD(cvt_sh(FRS1, RM));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fcvt_h_w.h b/hwacha/insns_ut_half/ut_fcvt_h_w.h
deleted file mode 100644 (file)
index 383a3c0..0000000
--- a/hwacha/insns_ut_half/ut_fcvt_h_w.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_fp;
-softfloat_roundingMode = RM;
-WRITE_HFRD(i32_to_f32((int32_t)RS1));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fcvt_h_wu.h b/hwacha/insns_ut_half/ut_fcvt_h_wu.h
deleted file mode 100644 (file)
index 228b25a..0000000
--- a/hwacha/insns_ut_half/ut_fcvt_h_wu.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_fp;
-softfloat_roundingMode = RM;
-WRITE_HFRD(ui32_to_f32((uint32_t)RS1));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fcvt_l_h.h b/hwacha/insns_ut_half/ut_fcvt_l_h.h
deleted file mode 100644 (file)
index 1551ce2..0000000
--- a/hwacha/insns_ut_half/ut_fcvt_l_h.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_xpr64;
-require_fp;
-softfloat_roundingMode = RM;
-WRITE_RD(f32_to_i64(HFRS1, RM, true));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fcvt_lu_h.h b/hwacha/insns_ut_half/ut_fcvt_lu_h.h
deleted file mode 100644 (file)
index b2fc5fd..0000000
--- a/hwacha/insns_ut_half/ut_fcvt_lu_h.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_xpr64;
-require_fp;
-softfloat_roundingMode = RM;
-WRITE_RD(f32_to_ui64(HFRS1, RM, true));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fcvt_s_h.h b/hwacha/insns_ut_half/ut_fcvt_s_h.h
deleted file mode 100644 (file)
index f779da8..0000000
--- a/hwacha/insns_ut_half/ut_fcvt_s_h.h
+++ /dev/null
@@ -1,3 +0,0 @@
-require_fp;
-WRITE_FRD(HFRS1);
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fcvt_w_h.h b/hwacha/insns_ut_half/ut_fcvt_w_h.h
deleted file mode 100644 (file)
index 5a2f084..0000000
--- a/hwacha/insns_ut_half/ut_fcvt_w_h.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_fp;
-softfloat_roundingMode = RM;
-WRITE_RD(sext32(f32_to_i32(HFRS1, RM, true)));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fcvt_wu_h.h b/hwacha/insns_ut_half/ut_fcvt_wu_h.h
deleted file mode 100644 (file)
index 537f50a..0000000
--- a/hwacha/insns_ut_half/ut_fcvt_wu_h.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_fp;
-softfloat_roundingMode = RM;
-WRITE_RD(sext32(f32_to_ui32(HFRS1, RM, true)));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fdiv_h.h b/hwacha/insns_ut_half/ut_fdiv_h.h
deleted file mode 100644 (file)
index 924b0c7..0000000
--- a/hwacha/insns_ut_half/ut_fdiv_h.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_fp;
-softfloat_roundingMode = RM;
-WRITE_HFRD(f32_div(HFRS1, HFRS2));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_feq_h.h b/hwacha/insns_ut_half/ut_feq_h.h
deleted file mode 100644 (file)
index a6b4707..0000000
--- a/hwacha/insns_ut_half/ut_feq_h.h
+++ /dev/null
@@ -1,3 +0,0 @@
-require_fp;
-WRITE_RD(f32_eq(HFRS1, HFRS2));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fle_h.h b/hwacha/insns_ut_half/ut_fle_h.h
deleted file mode 100644 (file)
index 2c17204..0000000
--- a/hwacha/insns_ut_half/ut_fle_h.h
+++ /dev/null
@@ -1,3 +0,0 @@
-require_fp;
-WRITE_RD(f32_le(HFRS1, HFRS2));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_flh.h b/hwacha/insns_ut_half/ut_flh.h
deleted file mode 100644 (file)
index 90872ed..0000000
--- a/hwacha/insns_ut_half/ut_flh.h
+++ /dev/null
@@ -1,2 +0,0 @@
-require_fp;
-WRITE_FRD(MMU.load_int16(RS1 + insn.i_imm()));

diff --git a/hwacha/insns_ut_half/ut_flt_h.h b/hwacha/insns_ut_half/ut_flt_h.h
deleted file mode 100644 (file)
index 39a0393..0000000
--- a/hwacha/insns_ut_half/ut_flt_h.h
+++ /dev/null
@@ -1,3 +0,0 @@
-require_fp;
-WRITE_RD(f32_lt(HFRS1, HFRS2));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fmadd_h.h b/hwacha/insns_ut_half/ut_fmadd_h.h
deleted file mode 100644 (file)
index cfbd82e..0000000
--- a/hwacha/insns_ut_half/ut_fmadd_h.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_fp;
-softfloat_roundingMode = RM;
-WRITE_HFRD(f32_mulAdd(HFRS1, HFRS2, HFRS3));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fmax_h.h b/hwacha/insns_ut_half/ut_fmax_h.h
deleted file mode 100644 (file)
index 32d3aa6..0000000
--- a/hwacha/insns_ut_half/ut_fmax_h.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_fp;
-WRITE_HFRD(isNaNF32UI(HFRS2) || f32_le_quiet(HFRS2,HFRS1) /* && FRS1 not NaN */
-      ? HFRS1 : HFRS2);
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fmin_h.h b/hwacha/insns_ut_half/ut_fmin_h.h
deleted file mode 100644 (file)
index a6a7cc3..0000000
--- a/hwacha/insns_ut_half/ut_fmin_h.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_fp;
-WRITE_HFRD(isNaNF32UI(HFRS2) || f32_lt_quiet(HFRS1,HFRS2) /* && FRS1 not NaN */
-      ? HFRS1 : HFRS2);
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fmsub_h.h b/hwacha/insns_ut_half/ut_fmsub_h.h
deleted file mode 100644 (file)
index 323a8d0..0000000
--- a/hwacha/insns_ut_half/ut_fmsub_h.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_fp;
-softfloat_roundingMode = RM;
-WRITE_HFRD(f32_mulAdd(HFRS1, HFRS2, HFRS3 ^ (uint32_t)INT32_MIN));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fmul_h.h b/hwacha/insns_ut_half/ut_fmul_h.h
deleted file mode 100644 (file)
index 669dd0e..0000000
--- a/hwacha/insns_ut_half/ut_fmul_h.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_fp;
-softfloat_roundingMode = RM;
-WRITE_HFRD(f32_mulAdd(HFRS1, HFRS2, (HFRS1 ^ HFRS2) & (uint32_t)INT32_MIN));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fmv_h_x.h b/hwacha/insns_ut_half/ut_fmv_h_x.h
deleted file mode 100644 (file)
index f3eac82..0000000
--- a/hwacha/insns_ut_half/ut_fmv_h_x.h
+++ /dev/null
@@ -1,2 +0,0 @@
-require_fp;
-WRITE_FRD(RS1);

diff --git a/hwacha/insns_ut_half/ut_fmv_x_h.h b/hwacha/insns_ut_half/ut_fmv_x_h.h
deleted file mode 100644 (file)
index d0a84bc..0000000
--- a/hwacha/insns_ut_half/ut_fmv_x_h.h
+++ /dev/null
@@ -1,2 +0,0 @@
-require_fp;
-WRITE_RD(sext16(FRS1));

diff --git a/hwacha/insns_ut_half/ut_fnmadd_h.h b/hwacha/insns_ut_half/ut_fnmadd_h.h
deleted file mode 100644 (file)
index f17cd8e..0000000
--- a/hwacha/insns_ut_half/ut_fnmadd_h.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_fp;
-softfloat_roundingMode = RM;
-WRITE_HFRD(f32_mulAdd(HFRS1 ^ (uint32_t)INT32_MIN, HFRS2, HFRS3 ^ (uint32_t)INT32_MIN));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fnmsub_h.h b/hwacha/insns_ut_half/ut_fnmsub_h.h
deleted file mode 100644 (file)
index 9a3161a..0000000
--- a/hwacha/insns_ut_half/ut_fnmsub_h.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_fp;
-softfloat_roundingMode = RM;
-WRITE_HFRD(f32_mulAdd(HFRS1 ^ (uint32_t)INT32_MIN, HFRS2, HFRS3));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fsgnj_h.h b/hwacha/insns_ut_half/ut_fsgnj_h.h
deleted file mode 100644 (file)
index 152d02b..0000000
--- a/hwacha/insns_ut_half/ut_fsgnj_h.h
+++ /dev/null
@@ -1,2 +0,0 @@
-require_fp;
-WRITE_FRD((FRS1 &~ (uint16_t)INT16_MIN) | (FRS2 & (uint16_t)INT16_MIN));

diff --git a/hwacha/insns_ut_half/ut_fsgnjn_h.h b/hwacha/insns_ut_half/ut_fsgnjn_h.h
deleted file mode 100644 (file)
index b098150..0000000
--- a/hwacha/insns_ut_half/ut_fsgnjn_h.h
+++ /dev/null
@@ -1,2 +0,0 @@
-require_fp;
-WRITE_FRD((FRS1 &~ (uint32_t)INT32_MIN) | ((~FRS2) & (uint32_t)INT32_MIN));

diff --git a/hwacha/insns_ut_half/ut_fsgnjx_h.h b/hwacha/insns_ut_half/ut_fsgnjx_h.h
deleted file mode 100644 (file)
index 2b6d7ac..0000000
--- a/hwacha/insns_ut_half/ut_fsgnjx_h.h
+++ /dev/null
@@ -1,2 +0,0 @@
-require_fp;
-WRITE_FRD(FRS1 ^ (FRS2 & (uint16_t)INT16_MIN));

diff --git a/hwacha/insns_ut_half/ut_fsh.h b/hwacha/insns_ut_half/ut_fsh.h
deleted file mode 100644 (file)
index 945d3e3..0000000
--- a/hwacha/insns_ut_half/ut_fsh.h
+++ /dev/null
@@ -1,2 +0,0 @@
-require_fp;
-MMU.store_uint16(RS1 + insn.s_imm(), FRS2);

diff --git a/hwacha/insns_ut_half/ut_fsqrt_h.h b/hwacha/insns_ut_half/ut_fsqrt_h.h
deleted file mode 100644 (file)
index f8b83fb..0000000
--- a/hwacha/insns_ut_half/ut_fsqrt_h.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_fp;
-softfloat_roundingMode = RM;
-WRITE_HFRD(f32_sqrt(HFRS1));
-set_fp_exceptions;

diff --git a/hwacha/insns_ut_half/ut_fsub_h.h b/hwacha/insns_ut_half/ut_fsub_h.h
deleted file mode 100644 (file)
index 39cebbe..0000000
--- a/hwacha/insns_ut_half/ut_fsub_h.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_fp;
-softfloat_roundingMode = RM;
-WRITE_HFRD(f32_mulAdd(HFRS1, 0x3f800000, HFRS2 ^ (uint32_t)INT32_MIN));
-set_fp_exceptions;

diff --git a/hwacha/opcodes_hwacha.h b/hwacha/opcodes_hwacha.h
index 297b3afca604d91a973de66a0e36553168012f1d..7fa05e3c9c97a861e3382957d384dce2d104b329 100644 (file)
--- a/hwacha/opcodes_hwacha.h
+++ b/hwacha/opcodes_hwacha.h
@@ -1,43 +1,46 @@
-DECLARE_INSN(vf, 0x10202b, 0x1f0707f)
-DECLARE_INSN(vflsegd, 0x1600205b, 0x1ff0707f)
-DECLARE_INSN(vflsegstd, 0x1600305b, 0x1e00707f)
-DECLARE_INSN(vflsegstw, 0x1400305b, 0x1e00707f)
-DECLARE_INSN(vflsegw, 0x1400205b, 0x1ff0707f)
-DECLARE_INSN(vfssegd, 0x1600207b, 0x1ff0707f)
-DECLARE_INSN(vfssegstd, 0x1600307b, 0x1e00707f)
-DECLARE_INSN(vfssegstw, 0x1400307b, 0x1e00707f)
-DECLARE_INSN(vfssegw, 0x1400207b, 0x1ff0707f)
-DECLARE_INSN(vgetcfg, 0x400b, 0xfffff07f)
-DECLARE_INSN(vgetvl, 0x200400b, 0xfffff07f)
-DECLARE_INSN(vlsegb, 0x205b, 0x1ff0707f)
-DECLARE_INSN(vlsegbu, 0x800205b, 0x1ff0707f)
-DECLARE_INSN(vlsegd, 0x600205b, 0x1ff0707f)
-DECLARE_INSN(vlsegh, 0x200205b, 0x1ff0707f)
-DECLARE_INSN(vlseghu, 0xa00205b, 0x1ff0707f)
-DECLARE_INSN(vlsegstb, 0x305b, 0x1e00707f)
-DECLARE_INSN(vlsegstbu, 0x800305b, 0x1e00707f)
-DECLARE_INSN(vlsegstd, 0x600305b, 0x1e00707f)
-DECLARE_INSN(vlsegsth, 0x200305b, 0x1e00707f)
-DECLARE_INSN(vlsegsthu, 0xa00305b, 0x1e00707f)
-DECLARE_INSN(vlsegstw, 0x400305b, 0x1e00707f)
-DECLARE_INSN(vlsegstwu, 0xc00305b, 0x1e00707f)
-DECLARE_INSN(vlsegw, 0x400205b, 0x1ff0707f)
-DECLARE_INSN(vlsegwu, 0xc00205b, 0x1ff0707f)
-DECLARE_INSN(vmsv, 0x200202b, 0xfff0707f)
-DECLARE_INSN(vmvv, 0x200002b, 0xfff0707f)
-DECLARE_INSN(vsetcfg, 0x200b, 0x7fff)
-DECLARE_INSN(vsetprec, 0x805b, 0xfffff)
-DECLARE_INSN(vsetvl, 0x600b, 0xfff0707f)
-DECLARE_INSN(vssegb, 0x207b, 0x1ff0707f)
-DECLARE_INSN(vssegd, 0x600207b, 0x1ff0707f)
-DECLARE_INSN(vssegh, 0x200207b, 0x1ff0707f)
-DECLARE_INSN(vssegstb, 0x307b, 0x1e00707f)
-DECLARE_INSN(vssegstd, 0x600307b, 0x1e00707f)
-DECLARE_INSN(vssegsth, 0x200307b, 0x1e00707f)
-DECLARE_INSN(vssegstw, 0x400307b, 0x1e00707f)
-DECLARE_INSN(vssegw, 0x400207b, 0x1ff0707f)
-DECLARE_INSN(vxcptaux, 0x200402b, 0xfffff07f)
-DECLARE_INSN(vxcptcause, 0x402b, 0xfffff07f)
-DECLARE_INSN(vxcptkill, 0x400302b, 0xffffffff)
-DECLARE_INSN(vxcptrestore, 0x200302b, 0xfff07fff)
-DECLARE_INSN(vxcptsave, 0x302b, 0xfff07fff)
+#include "encodings_hwacha.h"
+
+DECLARE_INSN(vf, MATCH_VF, MASK_VF)
+DECLARE_INSN(vflsegd, MATCH_VFLSEGD, MASK_VFLSEGD)
+DECLARE_INSN(vflsegstd, MATCH_VFLSEGSTD, MASK_VFLSEGSTD)
+DECLARE_INSN(vflsegstw, MATCH_VFLSEGSTW, MASK_VFLSEGSTW)
+DECLARE_INSN(vflsegw, MATCH_VFLSEGW, MASK_VFLSEGW)
+DECLARE_INSN(vfmsv, MATCH_VFMSV, MASK_VFMSV)
+DECLARE_INSN(vfmvv, MATCH_VFMVV, MASK_VFMVV)
+DECLARE_INSN(vfssegd, MATCH_VFSSEGD, MASK_VFSSEGD)
+DECLARE_INSN(vfssegstd, MATCH_VFSSEGSTD, MASK_VFSSEGSTD)
+DECLARE_INSN(vfssegstw, MATCH_VFSSEGSTW, MASK_VFSSEGSTW)
+DECLARE_INSN(vfssegw, MATCH_VFSSEGW, MASK_VFSSEGW)
+DECLARE_INSN(vgetcfg, MATCH_VGETCFG, MASK_VGETCFG)
+DECLARE_INSN(vgetvl, MATCH_VGETVL, MASK_VGETVL)
+DECLARE_INSN(vlsegb, MATCH_VLSEGB, MASK_VLSEGB)
+DECLARE_INSN(vlsegbu, MATCH_VLSEGBU, MASK_VLSEGBU)
+DECLARE_INSN(vlsegd, MATCH_VLSEGD, MASK_VLSEGD)
+DECLARE_INSN(vlsegh, MATCH_VLSEGH, MASK_VLSEGH)
+DECLARE_INSN(vlseghu, MATCH_VLSEGHU, MASK_VLSEGHU)
+DECLARE_INSN(vlsegstb, MATCH_VLSEGSTB, MASK_VLSEGSTB)
+DECLARE_INSN(vlsegstbu, MATCH_VLSEGSTBU, MASK_VLSEGSTBU)
+DECLARE_INSN(vlsegstd, MATCH_VLSEGSTD, MASK_VLSEGSTD)
+DECLARE_INSN(vlsegsth, MATCH_VLSEGSTH, MASK_VLSEGSTH)
+DECLARE_INSN(vlsegsthu, MATCH_VLSEGSTHU, MASK_VLSEGSTHU)
+DECLARE_INSN(vlsegstw, MATCH_VLSEGSTW, MASK_VLSEGSTW)
+DECLARE_INSN(vlsegstwu, MATCH_VLSEGSTWU, MASK_VLSEGSTWU)
+DECLARE_INSN(vlsegw, MATCH_VLSEGW, MASK_VLSEGW)
+DECLARE_INSN(vlsegwu, MATCH_VLSEGWU, MASK_VLSEGWU)
+DECLARE_INSN(vmsv, MATCH_VMSV, MASK_VMSV)
+DECLARE_INSN(vmvv, MATCH_VMVV, MASK_VMVV)
+DECLARE_INSN(vsetcfg, MATCH_VSETCFG, MASK_VSETCFG)
+DECLARE_INSN(vsetvl, MATCH_VSETVL, MASK_VSETVL)
+DECLARE_INSN(vssegb, MATCH_VSSEGB, MASK_VSSEGB)
+DECLARE_INSN(vssegd, MATCH_VSSEGD, MASK_VSSEGD)
+DECLARE_INSN(vssegh, MATCH_VSSEGH, MASK_VSSEGH)
+DECLARE_INSN(vssegstb, MATCH_VSSEGSTB, MASK_VSSEGSTB)
+DECLARE_INSN(vssegstd, MATCH_VSSEGSTD, MASK_VSSEGSTD)
+DECLARE_INSN(vssegsth, MATCH_VSSEGSTH, MASK_VSSEGSTH)
+DECLARE_INSN(vssegstw, MATCH_VSSEGSTW, MASK_VSSEGSTW)
+DECLARE_INSN(vssegw, MATCH_VSSEGW, MASK_VSSEGW)
+DECLARE_INSN(vxcptaux, MATCH_VXCPTAUX, MASK_VXCPTAUX)
+DECLARE_INSN(vxcptcause, MATCH_VXCPTCAUSE, MASK_VXCPTCAUSE)
+DECLARE_INSN(vxcptkill, MATCH_VXCPTKILL, MASK_VXCPTKILL)
+DECLARE_INSN(vxcptrestore, MATCH_VXCPTRESTORE, MASK_VXCPTRESTORE)
+DECLARE_INSN(vxcptsave, MATCH_VXCPTSAVE, MASK_VXCPTSAVE)

diff --git a/hwacha/opcodes_hwacha_ut.h b/hwacha/opcodes_hwacha_ut.h
index cca51540a26614191bb2556371f08c6d37bcc3aa..f0f01dddcdc5e3ee17b4522c69ec5b99eafb930b 100644 (file)
--- a/hwacha/opcodes_hwacha_ut.h
+++ b/hwacha/opcodes_hwacha_ut.h
@@ -137,3 +137,37 @@ DECLARE_INSN(ut_fsw, 0x2027, 0x707f)
 DECLARE_INSN(ut_sb, 0x23, 0x707f)
 DECLARE_INSN(ut_fmsub_d, 0x2000047, 0x600007f)
 DECLARE_INSN(ut_sd, 0x3023, 0x707f)
+
+DECLARE_INSN(ut_fcvt_h_lu, 0x6c000053, 0xfff0007f)
+DECLARE_INSN(ut_fmin_h, 0xc4000053, 0xfe00707f)
+DECLARE_INSN(ut_fcvt_wu_h, 0x5c000053, 0xfff0007f)
+DECLARE_INSN(ut_fdiv_h, 0x1c000053, 0xfe00007f)
+DECLARE_INSN(ut_fcvt_h_wu, 0x7c000053, 0xfff0007f)
+DECLARE_INSN(ut_fsgnj_h, 0x2c000053, 0xfe00707f)
+DECLARE_INSN(ut_fnmsub_h, 0x400004b, 0x600007f)
+DECLARE_INSN(ut_fle_h, 0xbc000053, 0xfe00707f)
+DECLARE_INSN(ut_fcvt_l_h, 0x44000053, 0xfff0007f)
+DECLARE_INSN(ut_fnmadd_h, 0x400004f, 0x600007f)
+DECLARE_INSN(ut_fcvt_h_s, 0x90000053, 0xfff0007f)
+DECLARE_INSN(ut_fcvt_h_w, 0x74000053, 0xfff0007f)
+DECLARE_INSN(ut_fcvt_d_h, 0x8c000053, 0xfff0007f)
+DECLARE_INSN(ut_fmax_h, 0xcc000053, 0xfe00707f)
+DECLARE_INSN(ut_fcvt_lu_h, 0x4c000053, 0xfff0007f)
+DECLARE_INSN(ut_fcvt_h_l, 0x64000053, 0xfff0007f)
+DECLARE_INSN(ut_fmv_x_h, 0xe4000053, 0xfff0707f)
+DECLARE_INSN(ut_fcvt_h_d, 0x92000053, 0xfff0007f)
+DECLARE_INSN(ut_flt_h, 0xb4000053, 0xfe00707f)
+DECLARE_INSN(ut_fadd_h, 0x4000053, 0xfe00007f)
+DECLARE_INSN(ut_fcvt_s_h, 0x84000053, 0xfff0007f)
+DECLARE_INSN(ut_fcvt_w_h, 0x54000053, 0xfff0007f)
+DECLARE_INSN(ut_fmul_h, 0x14000053, 0xfe00007f)
+DECLARE_INSN(ut_fmadd_h, 0x4000043, 0x600007f)
+DECLARE_INSN(ut_fsqrt_h, 0x24000053, 0xfff0007f)
+DECLARE_INSN(ut_fsgnjn_h, 0x34000053, 0xfe00707f)
+DECLARE_INSN(ut_fsub_h, 0xc000053, 0xfe00007f)
+DECLARE_INSN(ut_fsh, 0x1027, 0x707f)
+DECLARE_INSN(ut_fsgnjx_h, 0x3c000053, 0xfe00707f)
+DECLARE_INSN(ut_flh, 0x1007, 0x707f)
+DECLARE_INSN(ut_fmsub_h, 0x4000047, 0x600007f)
+DECLARE_INSN(ut_feq_h, 0xac000053, 0xfe00707f)
+DECLARE_INSN(ut_fmv_h_x, 0xf4000053, 0xfff0707f)

diff --git a/hwacha/opcodes_hwacha_ut_half.h b/hwacha/opcodes_hwacha_ut_half.h
deleted file mode 100644 (file)
index b869a07..0000000
--- a/hwacha/opcodes_hwacha_ut_half.h
+++ /dev/null
@@ -1,33 +0,0 @@
-DECLARE_INSN(ut_fcvt_h_lu, 0x6c000053, 0xfff0007f)
-DECLARE_INSN(ut_fmin_h, 0xc4000053, 0xfe00707f)
-DECLARE_INSN(ut_fcvt_wu_h, 0x5c000053, 0xfff0007f)
-DECLARE_INSN(ut_fdiv_h, 0x1c000053, 0xfe00007f)
-DECLARE_INSN(ut_fcvt_h_wu, 0x7c000053, 0xfff0007f)
-DECLARE_INSN(ut_fsgnj_h, 0x2c000053, 0xfe00707f)
-DECLARE_INSN(ut_fnmsub_h, 0x400004b, 0x600007f)
-DECLARE_INSN(ut_fle_h, 0xbc000053, 0xfe00707f)
-DECLARE_INSN(ut_fcvt_l_h, 0x44000053, 0xfff0007f)
-DECLARE_INSN(ut_fnmadd_h, 0x400004f, 0x600007f)
-DECLARE_INSN(ut_fcvt_h_s, 0x90000053, 0xfff0007f)
-DECLARE_INSN(ut_fcvt_h_w, 0x74000053, 0xfff0007f)
-DECLARE_INSN(ut_fcvt_d_h, 0x8c000053, 0xfff0007f)
-DECLARE_INSN(ut_fmax_h, 0xcc000053, 0xfe00707f)
-DECLARE_INSN(ut_fcvt_lu_h, 0x4c000053, 0xfff0007f)
-DECLARE_INSN(ut_fcvt_h_l, 0x64000053, 0xfff0007f)
-DECLARE_INSN(ut_fmv_x_h, 0xe4000053, 0xfff0707f)
-DECLARE_INSN(ut_fcvt_h_d, 0x92000053, 0xfff0007f)
-DECLARE_INSN(ut_flt_h, 0xb4000053, 0xfe00707f)
-DECLARE_INSN(ut_fadd_h, 0x4000053, 0xfe00007f)
-DECLARE_INSN(ut_fcvt_s_h, 0x84000053, 0xfff0007f)
-DECLARE_INSN(ut_fcvt_w_h, 0x54000053, 0xfff0007f)
-DECLARE_INSN(ut_fmul_h, 0x14000053, 0xfe00007f)
-DECLARE_INSN(ut_fmadd_h, 0x4000043, 0x600007f)
-DECLARE_INSN(ut_fsqrt_h, 0x24000053, 0xfff0007f)
-DECLARE_INSN(ut_fsgnjn_h, 0x34000053, 0xfe00707f)
-DECLARE_INSN(ut_fsub_h, 0xc000053, 0xfe00007f)
-DECLARE_INSN(ut_fsh, 0x1027, 0x707f)
-DECLARE_INSN(ut_fsgnjx_h, 0x3c000053, 0xfe00707f)
-DECLARE_INSN(ut_flh, 0x1007, 0x707f)
-DECLARE_INSN(ut_fmsub_h, 0x4000047, 0x600007f)
-DECLARE_INSN(ut_feq_h, 0xac000053, 0xfe00707f)
-DECLARE_INSN(ut_fmv_h_x, 0xf4000053, 0xfff0707f)