icmp: able to ping board :)

diff --git a/liteeth/core/icmp/__init__.py b/liteeth/core/icmp/__init__.py
index 8d65583b12950870a2fe33fe54e40c7b0b1e2aca..2af10c89de7673a468b7e5b3fe0c26d03bb54cd7 100644 (file)
--- a/liteeth/core/icmp/__init__.py
+++ b/liteeth/core/icmp/__init__.py
@@ -77,8 +77,7 @@ class LiteEthICMPRX(Module):
                valid = Signal()
                self.comb += valid.eq(
                        sink.stb &
-                       (self.sink.protocol == icmp_protocol) &
-                       (self.sink.ip_address == ip_address)
+                       (self.sink.protocol == icmp_protocol)
                )
                fsm.act("CHECK",
                        If(valid,
@@ -108,7 +107,7 @@ class LiteEthICMPRX(Module):
                )
                fsm.act("DROP",
                        sink.ack.eq(1),
-                       If(source.stb & source.eop & source.ack,
+                       If(sink.stb & sink.eop & sink.ack,
                                NextState("IDLE")
                        )
                )
@@ -118,7 +117,7 @@ class LiteEthICMPEcho(Module):
                self.sink = Sink(eth_icmp_user_description(8))
                self.source = Source(eth_icmp_user_description(8))
                ###
-               self.submodules.fifo = SyncFIFO(eth_icmp_user_description(8), 1024)
+               self.submodules.fifo = SyncFIFO(eth_icmp_user_description(8), 512, buffered=True)
                self.comb += [
                        Record.connect(self.sink, self.fifo.sink),
                        Record.connect(self.fifo.source, self.source),

diff --git a/liteeth/core/ip/__init__.py b/liteeth/core/ip/__init__.py
index c22069bec498a5ab9791ffe7cbb0b3cdaa910468..a03b0984ccba753132f059b258e55dd9c227ea68 100644 (file)
--- a/liteeth/core/ip/__init__.py
+++ b/liteeth/core/ip/__init__.py
@@ -159,7 +159,7 @@ class LiteEthIPRX(Module):
                        source.eop.eq(sink.eop),
                        source.length.eq(sink.total_length - (sink.ihl*4)),
                        source.protocol.eq(sink.protocol),
-                       source.ip_address.eq(sink.target_ip),
+                       source.ip_address.eq(sink.sender_ip),
                        source.data.eq(sink.data),
                        source.error.eq(sink.error)
                ]

diff --git a/liteeth/core/udp/__init__.py b/liteeth/core/udp/__init__.py
index 59ea5cfd79c97adc2714edb74cbf2850a73707d0..f017b5e605a215cc806c5aab1890bb0136ba964d 100644 (file)
--- a/liteeth/core/udp/__init__.py
+++ b/liteeth/core/udp/__init__.py
@@ -77,8 +77,7 @@ class LiteEthUDPRX(Module):
                valid = Signal()
                self.comb += valid.eq(
                        sink.stb &
-                       (self.sink.protocol == udp_protocol) &
-                       (self.sink.ip_address == ip_address)
+                       (self.sink.protocol == udp_protocol)
                )
 
                fsm.act("CHECK",
@@ -107,7 +106,7 @@ class LiteEthUDPRX(Module):
                )
                fsm.act("DROP",
                        sink.ack.eq(1),
-                       If(source.stb & source.eop & source.ack,
+                       If(sink.stb & sink.eop & sink.ack,
                                NextState("IDLE")
                        )
                )

diff --git a/targets/udpip.py b/targets/udpip.py
index 98a92484cafed9ad79e44f5db83ca007e3462ad9..b0307a3838219d0aac53cefb7792845c3d00b1a3 100644 (file)
--- a/targets/udpip.py
+++ b/targets/udpip.py
@@ -193,6 +193,8 @@ class UDPIPSoCDevel(UDPIPSoC, AutoCSR):
        def __init__(self, platform):
                UDPIPSoC.__init__(self, platform)
 
+               self.udpip_core_icmp_rx_fsm_state = Signal(4)
+               self.udpip_core_icmp_tx_fsm_state = Signal(4)
                self.udpip_core_udp_rx_fsm_state = Signal(4)
                self.udpip_core_udp_tx_fsm_state = Signal(4)
                self.udpip_core_ip_rx_fsm_state = Signal(4)
@@ -214,6 +216,26 @@ class UDPIPSoCDevel(UDPIPSoC, AutoCSR):
                        self.udpip_core.mac.core.source.ack,
                        self.udpip_core.mac.core.source.data,
 
+                       self.udpip_core.icmp.echo.sink.stb,
+                       self.udpip_core.icmp.echo.sink.sop,
+                       self.udpip_core.icmp.echo.sink.eop,
+                       self.udpip_core.icmp.echo.sink.ack,
+                       self.udpip_core.icmp.echo.sink.data,
+
+                       self.udpip_core.icmp.echo.source.stb,
+                       self.udpip_core.icmp.echo.source.sop,
+                       self.udpip_core.icmp.echo.source.eop,
+                       self.udpip_core.icmp.echo.source.ack,
+                       self.udpip_core.icmp.echo.source.data,
+
+                       self.udpip_core.ip.crossbar.master.sink.stb,
+                       self.udpip_core.ip.crossbar.master.sink.sop,
+                       self.udpip_core.ip.crossbar.master.sink.eop,
+                       self.udpip_core.ip.crossbar.master.sink.ack,
+                       self.udpip_core.ip.crossbar.master.sink.data,
+                       self.udpip_core.ip.crossbar.master.sink.ip_address,
+                       self.udpip_core.ip.crossbar.master.sink.protocol,
+
                        self.ethphy.sink.stb,
                        self.ethphy.sink.sop,
                        self.ethphy.sink.eop,
@@ -226,6 +248,8 @@ class UDPIPSoCDevel(UDPIPSoC, AutoCSR):
                        self.ethphy.source.ack,
                        self.ethphy.source.data,
 
+                       self.udpip_core_icmp_rx_fsm_state,
+                       self.udpip_core_icmp_tx_fsm_state,
                        self.udpip_core_udp_rx_fsm_state,
                        self.udpip_core_udp_tx_fsm_state,
                        self.udpip_core_ip_rx_fsm_state,
@@ -233,7 +257,6 @@ class UDPIPSoCDevel(UDPIPSoC, AutoCSR):
                        self.udpip_core_arp_rx_fsm_state,
                        self.udpip_core_arp_tx_fsm_state,
                        self.udpip_core_arp_table_fsm_state,
-
                )
 
                self.submodules.la = LiteScopeLA(debug, 2048)
@@ -243,6 +266,8 @@ class UDPIPSoCDevel(UDPIPSoC, AutoCSR):
        def do_finalize(self):
                UDPIPSoC.do_finalize(self)
                self.comb += [
+                       self.udpip_core_icmp_rx_fsm_state.eq(self.udpip_core.icmp.rx.fsm.state),
+                       self.udpip_core_icmp_tx_fsm_state.eq(self.udpip_core.icmp.tx.fsm.state),
                        self.udpip_core_udp_rx_fsm_state.eq(self.udpip_core.udp.rx.fsm.state),
                        self.udpip_core_udp_tx_fsm_state.eq(self.udpip_core.udp.tx.fsm.state),
                        self.udpip_core_ip_rx_fsm_state.eq(self.udpip_core.ip.rx.fsm.state),

diff --git a/test/test_udpip.py b/test/test_udpip.py
index eb980c99bb3a33f2ccc873027a305a7d8a6b9895..2d625c8916619d4cbddb748faf371571a18b1d89 100644 (file)
--- a/test/test_udpip.py
+++ b/test/test_udpip.py
@@ -23,16 +23,22 @@ regs.bist_generator_ip_address.write(convert_ip("192.168.1.10"))
 regs.bist_generator_length.write(64)
 
 conditions = {}
+#conditions = {
+#      "udpipsocdevel_mac_tx_cdc_sink_stb"     : 1
+#}
 conditions = {
-       "udpipsocdevel_mac_tx_cdc_sink_stb"     : 1
+       "udpipsocdevel_icmp_echo_sink_sink_stb" : 1
+}
+conditions = {
+       "udpip_core_ip_rx_fsm_state"    : 1
 }
 la.configure_term(port=0, cond=conditions)
 la.configure_sum("term")
 # Run Logic Analyzer
 la.run(offset=64, length=1024)
 
-for i in range(64):
-       regs.bist_generator_start.write(1)
+#for i in range(64):
+#      regs.bist_generator_start.write(1)
 
 while not la.done():
        pass