sign_hint = false;
break;
+ case AST_REALVALUE:
+ width_hint = std::max(width_hint, 32);
+ break;
+
case AST_IDENTIFIER:
id_ast = id2ast;
if (id_ast == NULL && current_scope.count(str))
return RTLIL::SigSpec(bitsAsConst());
}
+ case AST_REALVALUE:
+ {
+ int intvalue = round(realvalue);
+ log("Warning: converting real value %e to integer %d at %s:%d.\n",
+ realvalue, intvalue, filename.c_str(), linenum);
+ return RTLIL::SigSpec(intvalue);
+ }
+
// simply return the corresponding RTLIL::SigSpec for an AST_IDENTIFIER node
// for identifiers with dynamic bit ranges (e.g. "foo[bar]" or "foo[bar+3:bar]") a
// shifter cell is created and the output signal of this cell is returned