* gencode.c (tab): In shad/shld definitions, negate R[m] before

	the and operation instead of after.  For shad delete cast.  For shld
	use UR instead of R and delete cast.

diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog
index 11eee594697fc4ca8d4759858a16f96c663f7bf8..d63066e1f416ec362192507a280fdd1ef7ea5a3d 100644 (file)
--- a/sim/sh/ChangeLog
+++ b/sim/sh/ChangeLog
@@ -1,7 +1,15 @@
+Wed Nov 29 12:39:27 1995  Jim Wilson  <wilson@chestnut.cygnus.com>
+
+       * gencode.c (tab): In shad/shld definitions, negate R[m] before
+       the and operation instead of after.  For shad delete cast.  For shld
+       use UR instead of R and delete cast.
+
+start-sanitize-sh3e
 Fri Nov 17 12:48:55 1995  Jim Wilson  <wilson@chestnut.cygnus.com>
 
        * gencode.c (tab): Add explicit NaN support for ftrc instruction.
 
+end-sanitize-sh3e
 Wed Nov 15 11:25:27 1995  Stu Grossman  (grossman@cygnus.com)
 
        * interp.c:  Make target_byte_order be extern to prevent SGI cc from

diff --git a/sim/sh/gencode.c b/sim/sh/gencode.c
index 7c7f426a66d5706c9ed118ecc1c65913a5f0ebe1..acba02a3c3f537ed5c6df9a57745b214a3e17615 100644 (file)
--- a/sim/sh/gencode.c
+++ b/sim/sh/gencode.c
@@ -149,12 +149,12 @@ op tab[] =
   {"n","n","rotr <REG_N>", "0100nnnn00000101", "T=R[n]&1;R[n] = UR[n]>> 1;R[n]|=(T<<31);"},
   {"","","rte", "0000000000101011", 
     "{ int tmp = PC; PC=RLAT(R[15])+2;R[15]+=4;SET_SR(RLAT(R[15]) & 0x3f3);R[15]+=4;SL(tmp+2);}"},
-  {"","","rts", "0000000000001011", "ult=PC;PC=PR;SL(ult+2);"},
+  {"","","rts", "0000000000001011", "ult=PC;PC=PR-2;SL(ult+2);"},
   {"","","sett", "0000000000011000", "T=1;"},
   {"n","mn","shad <REG_M>,<REG_N>", "0100nnnnmmmm1100",
-     "R[n] = (R[m] < 0) ? (((int)R[n]) >> -(R[m]&0x1f) ): (R[n] << ((R[m]) & 0x1f)) ;"},
+    "R[n] = (R[m] < 0) ? (R[n] >> ((-R[m])&0x1f)) : (R[n] << (R[m] & 0x1f));"},
   {"n","mn","shld <REG_M>,<REG_N>", "0100nnnnmmmm1101",
-     "R[n] = (R[m] < 0) ? (((unsigned int)R[n]) >> -(R[m]&0x1f) ): (R[n] << ((R[m]) & 0x1f)) ;"},
+    "R[n] = (R[m] < 0) ? (UR[n] >> ((-R[m])&0x1f)): (R[n] << (R[m] & 0x1f));"},
   {"n","n","shal <REG_N>", "0100nnnn00100000", "T=R[n]<0; R[n]<<=1;"},
   {"n","n","shar <REG_N>", "0100nnnn00100001", "T=R[n]&1; R[n] = R[n] >> 1;"},
   {"n","n","shll <REG_N>", "0100nnnn00000000", "T=R[n]<0; R[n]<<=1;"},
@@ -227,7 +227,7 @@ op tab[] =
   {"", "", "fabs <FREG_N>", "1111nnnn01011101", "F[n] = fabs (F[n]);"},
   {"", "", "fsqrt <FREG_N>", "1111nnnn01101101", "F[n] = sqrt (F[n]);"},
   {"", "", "float FPUL,<FREG_N>", "1111nnnn00101101", "F[n] = (float)FPUL;"},
-  {"", "", "ftrc <FREG_N>, FPUL", "1111nnnn00111101", "FPUL = (int)F[n];"},
+  {"", "", "ftrc <FREG_N>, FPUL", "1111nnnn00111101", "if (F[n] != F[n]) /* NaN */ FPUL = 0x80000000; else FPUL = (int)F[n];"},
   {"", "", "ftst/nan <FREG_N>", "1111nnnn01111101", "T = isnan (F[n]);"},
   {"", "", "fsts FPUL,<FREG_N>", "1111nnnn00001101", "*(int *)buf = FPUL; F[n] = *(float *)buf;"},
   {"", "", "flds <FREG_N>,FPUL", "1111nnnn00011101", "*(float *)buf = F[n]; FPUL = *(int *)buf;"},