re PR testsuite/51258 (64-bit gcc.dg/atomic-compare-exchange-5.c link failure on...

	PR testsuite/51258
	* lib/target-supports.exp
	(check_effective_target_sync_long_long): Also supported on 32bit
	x86 targets.  Add comment about required dg-options.
	Add alpha*-*-* targets.
	(check_effective_target_sync_long_long_runtime): Ditto.

	* gcc.dg/atomic-op-4.c (dg-options): Add -march=pentium for
	32bit x86 targets.
	* gcc.dg/atomic-compare-exchange-4.c: Ditto.
	* gcc.dg/atomic-exchange-4.c: Ditto.
	* gcc.dg/atomic-load-4.c: Ditto.
	* gcc.dg/atomic-store-4.c: Ditto.
	* gcc.dg/di-longlong64-sync-1.c: Ditto.
	* gcc.dg/di-sync-multithread.c: Ditto.
	* gcc.dg/simulate-thread/atomic-load-longlong.c: Ditto.
	* gcc.dg/simulate-thread/atomic-other-longlong.c: Ditto.

From-SVN: r181728

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index e53a713fe48239c70b99bd250dc428f0ce702b4f..68c78f7d78e644a023531a296bc0e5f19f056487 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,23 @@
+2011-11-25  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR testsuite/51258
+       * lib/target-supports.exp
+       (check_effective_target_sync_long_long): Also supported on 32bit
+       x86 targets.  Add comment about required dg-options.
+       Add alpha*-*-* targets.
+       (check_effective_target_sync_long_long_runtime): Ditto.
+
+       * gcc.dg/atomic-op-4.c (dg-options): Add -march=pentium for
+       32bit x86 targets.
+       * gcc.dg/atomic-compare-exchange-4.c: Ditto.
+       * gcc.dg/atomic-exchange-4.c: Ditto.
+       * gcc.dg/atomic-load-4.c: Ditto.
+       * gcc.dg/atomic-store-4.c: Ditto.
+       * gcc.dg/di-longlong64-sync-1.c: Ditto.
+       * gcc.dg/di-sync-multithread.c: Ditto.
+       * gcc.dg/simulate-thread/atomic-load-longlong.c: Ditto.
+       * gcc.dg/simulate-thread/atomic-other-longlong.c: Ditto.
+
 2011-11-25  Uros Bizjak  <ubizjak@gmail.com>
 
        PR testsuite/51258

diff --git a/gcc/testsuite/gcc.dg/atomic-compare-exchange-4.c b/gcc/testsuite/gcc.dg/atomic-compare-exchange-4.c
index 2b34f0a56be18fb483c590eeb899d8ba81e5e6da..b6c783ddaba84801cec31550bf6603f0089946b0 100644 (file)
--- a/gcc/testsuite/gcc.dg/atomic-compare-exchange-4.c
+++ b/gcc/testsuite/gcc.dg/atomic-compare-exchange-4.c
@@ -3,6 +3,7 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_long_long_runtime } */
 /* { dg-options "" } */
+/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 
 /* Test the execution of __atomic_compare_exchange_n builtin for a long_long.  */
 

diff --git a/gcc/testsuite/gcc.dg/atomic-exchange-4.c b/gcc/testsuite/gcc.dg/atomic-exchange-4.c
index 0c564fd9ba27d3f4f11785f474ff3484e717690c..13022dd38d20283f264ae6546e8abe7c793c25f5 100644 (file)
--- a/gcc/testsuite/gcc.dg/atomic-exchange-4.c
+++ b/gcc/testsuite/gcc.dg/atomic-exchange-4.c
@@ -3,6 +3,7 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_long_long_runtime } */
 /* { dg-options "" } */
+/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 
 /* Test the execution of the __atomic_X builtin for a long_long.  */
 

diff --git a/gcc/testsuite/gcc.dg/atomic-load-4.c b/gcc/testsuite/gcc.dg/atomic-load-4.c
index 952342949ca87d4e07635b7fecbe91442cdea824..032ad246fd06ca0d5e1aab2fde1a5e77b85294d5 100644 (file)
--- a/gcc/testsuite/gcc.dg/atomic-load-4.c
+++ b/gcc/testsuite/gcc.dg/atomic-load-4.c
@@ -3,6 +3,7 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_long_long_runtime } */
 /* { dg-options "" } */
+/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 
 extern void abort(void);
 

diff --git a/gcc/testsuite/gcc.dg/atomic-op-4.c b/gcc/testsuite/gcc.dg/atomic-op-4.c
index 786b0bb7cf58d4f4b5497ea176500145d8429c9e..7c4a819bfaaea9fb16042e28d8a286e7c68e266d 100644 (file)
--- a/gcc/testsuite/gcc.dg/atomic-op-4.c
+++ b/gcc/testsuite/gcc.dg/atomic-op-4.c
@@ -3,6 +3,7 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_long_long_runtime } */
 /* { dg-options "" } */
+/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 
 /* Test the execution of the __atomic_*OP builtin routines for long long.  */
 

diff --git a/gcc/testsuite/gcc.dg/atomic-store-4.c b/gcc/testsuite/gcc.dg/atomic-store-4.c
index c526c5ce185a0334f3627d0f940e215dead73022..0863be99d011fa9844083c46cc0712e7cd50762f 100644 (file)
--- a/gcc/testsuite/gcc.dg/atomic-store-4.c
+++ b/gcc/testsuite/gcc.dg/atomic-store-4.c
@@ -3,6 +3,7 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_long_long_runtime } */
 /* { dg-options "" } */
+/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 
 /* Test the execution of the __atomic_store_n builtin for a long long.  */
 

diff --git a/gcc/testsuite/gcc.dg/di-longlong64-sync-1.c b/gcc/testsuite/gcc.dg/di-longlong64-sync-1.c
index 9bb31ba649cf55372526d1661896576a62979966..f04cf62e03d382686fa687d0afc954dba9ea2298 100644 (file)
--- a/gcc/testsuite/gcc.dg/di-longlong64-sync-1.c
+++ b/gcc/testsuite/gcc.dg/di-longlong64-sync-1.c
@@ -1,6 +1,8 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_long_long_runtime } */
 /* { dg-options "-std=gnu99" } */
+/* { dg-additional-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+
 /* { dg-message "note: '__sync_fetch_and_nand' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */
 /* { dg-message "note: '__sync_nand_and_fetch' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */
 

diff --git a/gcc/testsuite/gcc.dg/di-sync-multithread.c b/gcc/testsuite/gcc.dg/di-sync-multithread.c
index 3cd93b0f3f5d8e1f99fcb8b6ca53654a645d9984..307ebf8b314e4199874bf0e2d6e5e1435f12c62c 100644 (file)
--- a/gcc/testsuite/gcc.dg/di-sync-multithread.c
+++ b/gcc/testsuite/gcc.dg/di-sync-multithread.c
@@ -3,6 +3,7 @@
 /* { dg-require-effective-target pthread_h } */
 /* { dg-require-effective-target pthread } */
 /* { dg-options "-pthread -std=gnu99" } */
+/* { dg-additional-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 
 /* test of long long atomic ops performed in parallel in 3 pthreads
    david.gilbert@linaro.org */

diff --git a/gcc/testsuite/gcc.dg/simulate-thread/atomic-load-longlong.c b/gcc/testsuite/gcc.dg/simulate-thread/atomic-load-longlong.c
index c555c4c26d9e971b44ae5d810d6e36dcbbc578cf..91f9a0627147302a136f0774aad7de4f34c4d18f 100644 (file)
--- a/gcc/testsuite/gcc.dg/simulate-thread/atomic-load-longlong.c
+++ b/gcc/testsuite/gcc.dg/simulate-thread/atomic-load-longlong.c
@@ -1,6 +1,7 @@
 /* { dg-do link } */
 /* { dg-require-effective-target sync_long_long_runtime } */
 /* { dg-options "" } */
+/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 /* { dg-final { simulate-thread } } */
 
 

diff --git a/gcc/testsuite/gcc.dg/simulate-thread/atomic-other-longlong.c b/gcc/testsuite/gcc.dg/simulate-thread/atomic-other-longlong.c
index 3cffbb47aae8d1d2a3b0e8b4a0c89b5c3b47c2ca..087c4660cfb2045bb77f73c1774b73b7a3c7f705 100644 (file)
--- a/gcc/testsuite/gcc.dg/simulate-thread/atomic-other-longlong.c
+++ b/gcc/testsuite/gcc.dg/simulate-thread/atomic-other-longlong.c
@@ -1,6 +1,7 @@
 /* { dg-do link } */
 /* { dg-require-effective-target sync_long_long_runtime } */
 /* { dg-options "" } */
+/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 /* { dg-final { simulate-thread } } */
 
 

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 49f2d32ecf8fc8f72fd22da1fb53866bc5fbe054..78223afe601a90c43b68f9359eb06e557bd0aa60 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -3644,11 +3644,14 @@ proc check_effective_target_sync_int_128_runtime { } {
 }
 
 # Return 1 if the target supports atomic operations on "long long".
+#
+# Note: 32bit x86 targets require -march=pentium in dg-options.
 
 proc check_effective_target_sync_long_long { } {
-    if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
-        && ![is-effective-target ia32]
-        || [istarget arm*-*-*] } {
+    if { [istarget x86_64-*-*]
+        || [istarget i?86-*-*])
+        || [istarget arm*-*-*]
+        || [istarget alpha*-*-*] } {
        return 1
     } else {
        return 0
@@ -3657,10 +3660,12 @@ proc check_effective_target_sync_long_long { } {
 
 # Return 1 if the target supports atomic operations on "long long"
 # and can execute them.
+#
+# Note: 32bit x86 targets require -march=pentium in dg-options.
 
 proc check_effective_target_sync_long_long_runtime { } {
-    if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
-        && ![is-effective-target ia32] } {
+    if { [istarget x86_64-*-*]
+        || [istarget i?86-*-*] } {
        return [check_cached_effective_target sync_long_long_available {
            check_runtime_nocache sync_long_long_available {
                #include "cpuid.h"
@@ -3689,6 +3694,8 @@ proc check_effective_target_sync_long_long_runtime { } {
              exit (0);
            }
        } "" ]
+    } elseif { [istarget alpha*-*-*] } {
+       return 1
     } else {
        return 0
     }