2003-06-27 Michael Snyder <msnyder@redhat.com>

        * gencode.c (op movsxy_tab): Fix an error in the bit pattern.

diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog
index 0cd05f52f69335afa35283a27b096bffec5102e0..ad4bd8fcfa0f8789caf598cf70aab89ae24705c4 100644 (file)
--- a/sim/sh/ChangeLog
+++ b/sim/sh/ChangeLog
@@ -4,6 +4,7 @@
 
 2003-06-27  Michael Snyder  <msnyder@redhat.com>
 
+       * gencode.c (op movsxy_tab): Fix an error in the bit pattern.
        * gencode.c (gensim_caselist): The movy instructions use
        registers R6 and R7 (not R4 and R5 like the movx insns).
 

diff --git a/sim/sh/gencode.c b/sim/sh/gencode.c
index e5dee8f987b80025b05b6eaf5e4fec90ff5cab05..e8e780fec9f7b8bcf581f025604b6091f78e18cb 100644 (file)
--- a/sim/sh/gencode.c
+++ b/sim/sh/gencode.c
@@ -1259,7 +1259,7 @@ op movsxy_tab[] =
     "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 2;",
     "iword &= 0xfd53; goto top;",
   },
-  { "n", "n8","movx.w <DSP_Aa>,@<REG_x>+REG_8","111100xxaa101000",
+  { "n", "n8","movx.w <DSP_Aa>,@<REG_x>+REG_8","111100xxaa101100",
     "WWAT (R[n], DSP_R (m) >> 16);",
     "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];",
     "iword &= 0xfd53; goto top;",