+2012-10-11 Terry Guo <terry.guo@arm.com>
+
+ * config/arm/arm.c (arm_arch6m): New variable to denote armv6-m
+ architecture.
+ * config/arm/arm.h (TARGET_HAVE_DMB): The armv6-m also has DMB
+ instruction.
+
2012-10-11 Hans-Peter Nilsson <hp@bitrange.com>
PR target/54373
/* Nonzero if this chip supports the ARM 6K extensions. */
int arm_arch6k = 0;
+/* Nonzero if instructions present in ARMv6-M can be used. */
+int arm_arch6m = 0;
+
/* Nonzero if this chip supports the ARM 7 extensions. */
int arm_arch7 = 0;
arm_arch6 = (insn_flags & FL_ARCH6) != 0;
arm_arch6k = (insn_flags & FL_ARCH6K) != 0;
arm_arch_notm = (insn_flags & FL_NOTM) != 0;
+ arm_arch6m = arm_arch6 && !arm_arch_notm;
arm_arch7 = (insn_flags & FL_ARCH7) != 0;
arm_arch7em = (insn_flags & FL_ARCH7EM) != 0;
arm_arch_thumb2 = (insn_flags & FL_THUMB2) != 0;
#define TARGET_UNIFIED_ASM TARGET_THUMB2
/* Nonzero if this chip provides the DMB instruction. */
-#define TARGET_HAVE_DMB (arm_arch7)
+#define TARGET_HAVE_DMB (arm_arch6m || arm_arch7)
/* Nonzero if this chip implements a memory barrier via CP15. */
#define TARGET_HAVE_DMB_MCR (arm_arch6 && ! TARGET_HAVE_DMB \
/* Nonzero if this chip supports the ARM Architecture 6k extensions. */
extern int arm_arch6k;
+/* Nonzero if instructions present in ARMv6-M can be used. */
+extern int arm_arch6m;
+
/* Nonzero if this chip supports the ARM Architecture 7 extensions. */
extern int arm_arch7;