arm.c (arm_arch6m): New variable to denote armv6-m architecture.
authorTerry Guo <terry.guo@arm.com>
Thu, 11 Oct 2012 02:22:48 +0000 (02:22 +0000)
committerXuepeng Guo <xguo@gcc.gnu.org>
Thu, 11 Oct 2012 02:22:48 +0000 (02:22 +0000)
2012-10-11  Terry Guo  <terry.guo@arm.com>

        * config/arm/arm.c (arm_arch6m): New variable to denote armv6-m
        architecture.
        * config/arm/arm.h (TARGET_HAVE_DMB): The armv6-m also has DMB
        instruction.

From-SVN: r192346

gcc/ChangeLog
gcc/config/arm/arm.c
gcc/config/arm/arm.h

index a7b62bf4fe6f12dbb5c3a683791ff4d9a7ad8427..ccb0b790edad33d1eac929be558833fba98410b8 100644 (file)
@@ -1,3 +1,10 @@
+2012-10-11  Terry Guo  <terry.guo@arm.com>
+
+       * config/arm/arm.c (arm_arch6m): New variable to denote armv6-m
+       architecture.
+       * config/arm/arm.h (TARGET_HAVE_DMB): The armv6-m also has DMB
+       instruction.
+
 2012-10-11  Hans-Peter Nilsson  <hp@bitrange.com>
 
        PR target/54373
index 1470602a215533dca4b01e0b01b3f5de21d65b62..6ba027697563ba7b1f372a55de17e0aa46fd32e8 100644 (file)
@@ -753,6 +753,9 @@ int arm_arch6 = 0;
 /* Nonzero if this chip supports the ARM 6K extensions.  */
 int arm_arch6k = 0;
 
+/* Nonzero if instructions present in ARMv6-M can be used.  */
+int arm_arch6m = 0;
+
 /* Nonzero if this chip supports the ARM 7 extensions.  */
 int arm_arch7 = 0;
 
@@ -1737,6 +1740,7 @@ arm_option_override (void)
   arm_arch6 = (insn_flags & FL_ARCH6) != 0;
   arm_arch6k = (insn_flags & FL_ARCH6K) != 0;
   arm_arch_notm = (insn_flags & FL_NOTM) != 0;
+  arm_arch6m = arm_arch6 && !arm_arch_notm;
   arm_arch7 = (insn_flags & FL_ARCH7) != 0;
   arm_arch7em = (insn_flags & FL_ARCH7EM) != 0;
   arm_arch_thumb2 = (insn_flags & FL_THUMB2) != 0;
index 5f34f2a8100ecff2964b0576edb361518c1d30c1..34d364f00b979b6581e40d48ee6c257d0337f680 100644 (file)
@@ -325,7 +325,7 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
 #define TARGET_UNIFIED_ASM TARGET_THUMB2
 
 /* Nonzero if this chip provides the DMB instruction.  */
-#define TARGET_HAVE_DMB                (arm_arch7)
+#define TARGET_HAVE_DMB                (arm_arch6m || arm_arch7)
 
 /* Nonzero if this chip implements a memory barrier via CP15.  */
 #define TARGET_HAVE_DMB_MCR    (arm_arch6 && ! TARGET_HAVE_DMB \
@@ -470,6 +470,9 @@ extern int arm_arch6;
 /* Nonzero if this chip supports the ARM Architecture 6k extensions.  */
 extern int arm_arch6k;
 
+/* Nonzero if instructions present in ARMv6-M can be used.  */
+extern int arm_arch6m;
+
 /* Nonzero if this chip supports the ARM Architecture 7 extensions.  */
 extern int arm_arch7;