Add cover()
authorEddie Hung <eddie@fpgeh.com>
Thu, 22 Aug 2019 15:06:24 +0000 (08:06 -0700)
committerEddie Hung <eddie@fpgeh.com>
Thu, 22 Aug 2019 15:06:24 +0000 (08:06 -0700)
passes/opt/opt_expr.cc

index 7fdfa82bd99bbfc64fd1f74200f7685ceda6e564..aca15e5f27243376b4cd21ebe07c067e7c824081 100644 (file)
@@ -754,6 +754,7 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module, bool cons
                        }
 
                        if (width < GetSize(sig_a)) {
+                               cover("opt.opt_expr.trim_shiftx");
                                sig_a.remove(width, GetSize(sig_a)-width);
                                cell->setPort(ID::A, sig_a);
                                cell->setParam(ID(A_WIDTH), width);