ppc_vaddr = (Addr)tc->readIntReg(17);
timer_vaddr = (Addr)tc->readIntReg(18);
- virtProxy->write(ppc_vaddr, (uint32_t)SimClock::Frequency);
- virtProxy->write(timer_vaddr, (uint32_t)TIMER_FREQUENCY);
+ virtProxy.write(ppc_vaddr, (uint32_t)SimClock::Frequency);
+ virtProxy.write(timer_vaddr, (uint32_t)TIMER_FREQUENCY);
}
void
* Since we aren't using a bootloader, we have to copy the
* kernel arguments directly into the kernel's memory.
*/
- virtProxy->writeBlob(CommandLine(),
- (uint8_t*)params()->boot_osflags.c_str(),
- params()->boot_osflags.length()+1);
+ virtProxy.writeBlob(CommandLine(),
+ (uint8_t*)params()->boot_osflags.c_str(),
+ params()->boot_osflags.length()+1);
/**
* find the address of the est_cycle_freq variable and insert it
* calculated it by using the PIT, RTC, etc.
*/
if (kernelSymtab->findAddress("est_cycle_freq", addr))
- virtProxy->write(addr, (uint64_t)(SimClock::Frequency /
- params()->boot_cpu_frequency));
+ virtProxy.write(addr, (uint64_t)(SimClock::Frequency /
+ params()->boot_cpu_frequency));
/**
* 255 ASNs.
*/
if (kernelSymtab->findAddress("dp264_mv", addr))
- virtProxy->write(addr + 0x18, LittleEndianGuest::htog((uint32_t)127));
+ virtProxy.write(addr + 0x18, LittleEndianGuest::htog((uint32_t)127));
else
panic("could not find dp264_mv\n");
if (kernelSymtab->findAddress("loops_per_jiffy", addr)) {
Tick cpuFreq = tc->getCpuPtr()->frequency();
assert(intrFreq);
- FSTranslatingPortProxy* vp;
-
- vp = tc->getVirtProxy();
- vp->writeHtoG(addr, (uint32_t)((cpuFreq / intrFreq) * 0.9988));
+ FSTranslatingPortProxy &vp = tc->getVirtProxy();
+ vp.writeHtoG(addr, (uint32_t)((cpuFreq / intrFreq) * 0.9988));
}
}
if (!addr)
addr = tc->readMiscRegNoEffect(AlphaISA::IPR_PALtemp23);
- PortProxy* p = tc->getPhysProxy();
- p->readBlob(addr, (uint8_t *)&sp, sizeof(Addr));
+ PortProxy &p = tc->getPhysProxy();
+ p.readBlob(addr, (uint8_t *)&sp, sizeof(Addr));
return sp & ~ULL(0x3fff);
}
else
panic("Unknown int size");
- initVirtMem->writeBlob(stack_min, (uint8_t*)&argc, intSize);
+ initVirtMem.writeBlob(stack_min, (uint8_t*)&argc, intSize);
copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
//Copy the aux stuff
for (vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) {
- initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
+ initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
(uint8_t*)&(auxv[x].a_type), intSize);
- initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
+ initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
(uint8_t*)&(auxv[x].a_val), intSize);
}
: tc(_tc)
{
Addr addr = 0;
- FSTranslatingPortProxy* vp = tc->getVirtProxy();
+ FSTranslatingPortProxy &vp = tc->getVirtProxy();
SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab;
if (!symtab->findAddress("thread_info_size", addr))
panic("thread info not compiled into kernel\n");
- thread_info_size = vp->readGtoH<int32_t>(addr);
+ thread_info_size = vp.readGtoH<int32_t>(addr);
if (!symtab->findAddress("task_struct_size", addr))
panic("thread info not compiled into kernel\n");
- task_struct_size = vp->readGtoH<int32_t>(addr);
+ task_struct_size = vp.readGtoH<int32_t>(addr);
if (!symtab->findAddress("thread_info_task", addr))
panic("thread info not compiled into kernel\n");
- task_off = vp->readGtoH<int32_t>(addr);
+ task_off = vp.readGtoH<int32_t>(addr);
if (!symtab->findAddress("task_struct_pid", addr))
panic("thread info not compiled into kernel\n");
- pid_off = vp->readGtoH<int32_t>(addr);
+ pid_off = vp.readGtoH<int32_t>(addr);
if (!symtab->findAddress("task_struct_comm", addr))
panic("thread info not compiled into kernel\n");
- name_off = vp->readGtoH<int32_t>(addr);
+ name_off = vp.readGtoH<int32_t>(addr);
}
Addr
Addr tsk;
- FSTranslatingPortProxy* vp;
-
- vp = tc->getVirtProxy();
- tsk = vp->readGtoH<Addr>(base + task_off);
+ FSTranslatingPortProxy &vp = tc->getVirtProxy();
+ tsk = vp.readGtoH<Addr>(base + task_off);
return tsk;
}
uint16_t pd;
- FSTranslatingPortProxy* vp;
-
- vp = tc->getVirtProxy();
- pd = vp->readGtoH<uint16_t>(task + pid_off);
+ FSTranslatingPortProxy &vp = tc->getVirtProxy();
+ pd = vp.readGtoH<uint16_t>(task + pid_off);
return pd;
}
* others do.)
*/
if (consoleSymtab->findAddress("env_booted_osflags", addr)) {
- virtProxy->writeBlob(addr, (uint8_t*)params()->boot_osflags.c_str(),
- strlen(params()->boot_osflags.c_str()));
+ virtProxy.writeBlob(addr, (uint8_t*)params()->boot_osflags.c_str(),
+ strlen(params()->boot_osflags.c_str()));
}
/**
if (consoleSymtab->findAddress("m5_rpb", addr)) {
uint64_t data;
data = htog(params()->system_type);
- virtProxy->write(addr+0x50, data);
+ virtProxy.write(addr+0x50, data);
data = htog(params()->system_rev);
- virtProxy->write(addr+0x58, data);
+ virtProxy.write(addr+0x58, data);
} else
panic("could not find hwrpb\n");
}
// lda gp,Y(gp): opcode 8, Ra = 29, rb = 29
const uint32_t gp_lda_pattern = (8 << 26) | (29 << 21) | (29 << 16);
- uint32_t i1 = virtProxy->read<uint32_t>(addr);
- uint32_t i2 = virtProxy->read<uint32_t>(addr + sizeof(MachInst));
+ uint32_t i1 = virtProxy.read<uint32_t>(addr);
+ uint32_t i2 = virtProxy.read<uint32_t>(addr + sizeof(MachInst));
if ((i1 & inst_mask) == gp_ldah_pattern &&
(i2 & inst_mask) == gp_lda_pattern) {
{
Addr addr = 0;
if (consoleSymtab->findAddress("m5AlphaAccess", addr)) {
- virtProxy->write(addr, htog(Phys2K0Seg(access)));
+ virtProxy.write(addr, htog(Phys2K0Seg(access)));
} else {
panic("could not find m5AlphaAccess\n");
}
{
Addr addr = 0;
if (kernelSymtab->findAddress("enable_async_printf", addr)) {
- virtProxy->write(addr, (uint32_t)0);
+ virtProxy.write(addr, (uint32_t)0);
}
#ifdef DEBUG
return tc->readIntReg(16 + number);
} else {
Addr sp = tc->readIntReg(StackPointerReg);
- FSTranslatingPortProxy* vp = tc->getVirtProxy();
- uint64_t arg = vp->read<uint64_t>(sp +
- (number-NumArgumentRegs) * sizeof(uint64_t));
+ FSTranslatingPortProxy &vp = tc->getVirtProxy();
+ uint64_t arg = vp.read<uint64_t>(sp +
+ (number-NumArgumentRegs) *
+ sizeof(uint64_t));
return arg;
}
}
namespace AlphaISA {
PageTableEntry
-kernel_pte_lookup(PortProxy* mem, Addr ptbr, VAddr vaddr)
+kernel_pte_lookup(PortProxy &mem, Addr ptbr, VAddr vaddr)
{
Addr level1_pte = ptbr + vaddr.level1();
- PageTableEntry level1 = mem->read<uint64_t>(level1_pte);
+ PageTableEntry level1 = mem.read<uint64_t>(level1_pte);
if (!level1.valid()) {
DPRINTF(VtoPhys, "level 1 PTE not valid, va = %#\n", vaddr);
return 0;
}
Addr level2_pte = level1.paddr() + vaddr.level2();
- PageTableEntry level2 = mem->read<uint64_t>(level2_pte);
+ PageTableEntry level2 = mem.read<uint64_t>(level2_pte);
if (!level2.valid()) {
DPRINTF(VtoPhys, "level 2 PTE not valid, va = %#x\n", vaddr);
return 0;
}
Addr level3_pte = level2.paddr() + vaddr.level3();
- PageTableEntry level3 = mem->read<uint64_t>(level3_pte);
+ PageTableEntry level3 = mem.read<uint64_t>(level3_pte);
if (!level3.valid()) {
DPRINTF(VtoPhys, "level 3 PTE not valid, va = %#x\n", vaddr);
return 0;
namespace AlphaISA {
-PageTableEntry kernel_pte_lookup(PortProxy* mem, Addr ptbr,
+PageTableEntry kernel_pte_lookup(PortProxy &mem, Addr ptbr,
VAddr vaddr);
Addr vtophys(Addr vaddr);
int index = 0;
uint32_t tlsPtr = process->getSyscallArg(tc, index);
- tc->getMemProxy()->writeBlob(ArmLinuxProcess::commPage + 0x0ff0,
+ tc->getMemProxy().writeBlob(ArmLinuxProcess::commPage + 0x0ff0,
(uint8_t *)&tlsPtr, sizeof(tlsPtr));
tc->setMiscReg(MISCREG_TPIDRURO,tlsPtr);
return 0;
// Fill this page with swi -1 so we'll no if we land in it somewhere.
for (Addr addr = 0; addr < PageBytes; addr += sizeof(swiNeg1)) {
- tc->getMemProxy()->writeBlob(commPage + addr,
+ tc->getMemProxy().writeBlob(commPage + addr,
swiNeg1, sizeof(swiNeg1));
}
0x5f, 0xf0, 0x7f, 0xf5, // dmb
0x0e, 0xf0, 0xa0, 0xe1 // return
};
- tc->getMemProxy()->writeBlob(commPage + 0x0fa0, memory_barrier,
+ tc->getMemProxy().writeBlob(commPage + 0x0fa0, memory_barrier,
sizeof(memory_barrier));
uint8_t cmpxchg[] =
0x5f, 0xf0, 0x7f, 0xf5, // dmb
0x0e, 0xf0, 0xa0, 0xe1 // return
};
- tc->getMemProxy()->writeBlob(commPage + 0x0fc0, cmpxchg, sizeof(cmpxchg));
+ tc->getMemProxy().writeBlob(commPage + 0x0fc0, cmpxchg, sizeof(cmpxchg));
uint8_t get_tls[] =
{
0x70, 0x0f, 0x1d, 0xee, // mrc p15, 0, r0, c13, c0, 3
0x0e, 0xf0, 0xa0, 0xe1 // return
};
- tc->getMemProxy()->writeBlob(commPage + 0x0fe0, get_tls, sizeof(get_tls));
+ tc->getMemProxy().writeBlob(commPage + 0x0fe0, get_tls, sizeof(get_tls));
}
ArmISA::IntReg
DPRINTF(Loader, "Boot atags was %d bytes in total\n", size << 2);
DDUMP(Loader, boot_data, size << 2);
- physProxy->writeBlob(ParamsList, boot_data, size << 2);
+ physProxy.writeBlob(ParamsList, boot_data, size << 2);
#ifndef NDEBUG
kernelPanicEvent = addKernelFuncEvent<BreakPCEvent>("panic");
//Write out the sentry void *
uint32_t sentry_NULL = 0;
- initVirtMem->writeBlob(sentry_base,
+ initVirtMem.writeBlob(sentry_base,
(uint8_t*)&sentry_NULL, sentry_size);
//Fix up the aux vectors which point to other data
for (int i = auxv.size() - 1; i >= 0; i--) {
if (auxv[i].a_type == M5_AT_PLATFORM) {
auxv[i].a_val = platform_base;
- initVirtMem->writeString(platform_base, platform.c_str());
+ initVirtMem.writeString(platform_base, platform.c_str());
} else if (auxv[i].a_type == M5_AT_EXECFN) {
auxv[i].a_val = aux_data_base;
- initVirtMem->writeString(aux_data_base, filename.c_str());
+ initVirtMem.writeString(aux_data_base, filename.c_str());
} else if (auxv[i].a_type == M5_AT_RANDOM) {
auxv[i].a_val = aux_random_base;
// Just leave the value 0, we don't want randomness
//Copy the aux stuff
for(int x = 0; x < auxv.size(); x++)
{
- initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
+ initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
(uint8_t*)&(auxv[x].a_type), intSize);
- initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
+ initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
(uint8_t*)&(auxv[x].a_val), intSize);
}
//Write out the terminating zeroed auxilliary vector
const uint64_t zero = 0;
- initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
+ initVirtMem.writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
(uint8_t*)&zero, 2 * intSize);
copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
- initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
+ initVirtMem.writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
ThreadContext *tc = system->getThreadContext(contextIds[0]);
//Set the stack pointer register
{
Addr addr = 0;
- FSTranslatingPortProxy* vp;
-
- vp = tc->getVirtProxy();
+ FSTranslatingPortProxy &vp = tc->getVirtProxy();
if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_size", addr))
panic("thread info not compiled into kernel\n");
- thread_info_size = vp->readGtoH<int32_t>(addr);
+ thread_info_size = vp.readGtoH<int32_t>(addr);
if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_size", addr))
panic("thread info not compiled into kernel\n");
- task_struct_size = vp->readGtoH<int32_t>(addr);
+ task_struct_size = vp.readGtoH<int32_t>(addr);
if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_task", addr))
panic("thread info not compiled into kernel\n");
- task_off = vp->readGtoH<int32_t>(addr);
+ task_off = vp.readGtoH<int32_t>(addr);
if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_pid", addr))
panic("thread info not compiled into kernel\n");
- pid_off = vp->readGtoH<int32_t>(addr);
+ pid_off = vp.readGtoH<int32_t>(addr);
if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_comm", addr))
panic("thread info not compiled into kernel\n");
- name_off = vp->readGtoH<int32_t>(addr);
+ name_off = vp.readGtoH<int32_t>(addr);
}
Addr
{
0x07, 0xf0, 0xa0, 0xe1 // branch to r7
};
- physProxy->writeBlob(0x0, jump_to_bl, sizeof(jump_to_bl));
+ physProxy.writeBlob(0x0, jump_to_bl, sizeof(jump_to_bl));
inform("Using bootloader at address %#x\n", bootldr->entryPoint());
}
}
} else {
Addr sp = tc->readIntReg(StackPointerReg);
- FSTranslatingPortProxy* vp = tc->getVirtProxy();
+ FSTranslatingPortProxy &vp = tc->getVirtProxy();
uint64_t arg;
if (size == sizeof(uint64_t)) {
// If the argument is even it must be aligned
if ((number % 2) != 0)
number++;
- arg = vp->read<uint64_t>(sp +
+ arg = vp.read<uint64_t>(sp +
(number-NumArgumentRegs) * sizeof(uint32_t));
// since two 32 bit args == 1 64 bit arg, increment number
number++;
} else {
- arg = vp->read<uint32_t>(sp +
+ arg = vp.read<uint32_t>(sp +
(number-NumArgumentRegs) * sizeof(uint32_t));
}
return arg;
N = 0;
}
- PortProxy* port = tc->getPhysProxy();
+ PortProxy &port = tc->getPhysProxy();
Addr l1desc_addr = mbits(ttbr, 31, 14-N) | (bits(addr,31-N,20) << 2);
TableWalker::L1Descriptor l1desc;
- l1desc.data = port->read<uint32_t>(l1desc_addr);
+ l1desc.data = port.read<uint32_t>(l1desc_addr);
if (l1desc.type() == TableWalker::L1Descriptor::Ignore ||
l1desc.type() == TableWalker::L1Descriptor::Reserved) {
warn("Unable to translate virtual address: %#x\n", addr);
// Didn't find it at the first level, try againt
Addr l2desc_addr = l1desc.l2Addr() | (bits(addr, 19, 12) << 2);
TableWalker::L2Descriptor l2desc;
- l2desc.data = port->read<uint32_t>(l2desc_addr);
+ l2desc.data = port.read<uint32_t>(l2desc_addr);
if (l2desc.invalid()) {
warn("Unable to translate virtual address: %#x\n", addr);
if (!addr)
addr = tc->readMiscRegNoEffect(0/*MipsISA::IPR_PALtemp23*/);
- PortProxy* p = tc->getPhysProxy();
- p->readBlob(addr, (uint8_t *)&sp, sizeof(Addr));
+ PortProxy &p = tc->getPhysProxy();
+ p.readBlob(addr, (uint8_t *)&sp, sizeof(Addr));
return sp & ~ULL(0x3fff);
}
argc = htog((IntType)argc);
- initVirtMem->writeBlob(stack_min, (uint8_t*)&argc, intSize);
+ initVirtMem.writeBlob(stack_min, (uint8_t*)&argc, intSize);
copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
// Copy the aux vector
for (typename vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) {
- initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
+ initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
(uint8_t*)&(auxv[x].a_type), intSize);
- initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
+ initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
(uint8_t*)&(auxv[x].a_val), intSize);
}
for (unsigned i = 0; i < 2; i++) {
const IntType zero = 0;
const Addr addr = auxv_array_base + 2 * intSize * (auxv.size() + i);
- initVirtMem->writeBlob(addr, (uint8_t*)&zero, intSize);
+ initVirtMem.writeBlob(addr, (uint8_t*)&zero, intSize);
}
ThreadContext *tc = system->getThreadContext(contextIds[0]);
Addr tsk;
- FSTranslatingPortProxy* vp;
-
- vp = tc->getVirtProxy();
- tsk = vp->readGtoH<Addr>(base + task_off);
+ FSTranslatingPortProxy &vp = tc->getVirtProxy();
+ tsk = vp.readGtoH<Addr>(base + task_off);
return tsk;
}
uint16_t pd;
- FSTranslatingPortProxy* vp;
-
- vp = tc->getVirtProxy();
- pd = vp->readGtoH<uint16_t>(task + pid_off);
+ FSTranslatingPortProxy &vp = tc->getVirtProxy();
+ pd = vp.readGtoH<uint16_t>(task + pid_off);
return pd;
}
//Write out the sentry void *
uint32_t sentry_NULL = 0;
- initVirtMem->writeBlob(sentry_base,
+ initVirtMem.writeBlob(sentry_base,
(uint8_t*)&sentry_NULL, sentry_size);
//Fix up the aux vectors which point to other data
for (int i = auxv.size() - 1; i >= 0; i--) {
if (auxv[i].a_type == M5_AT_PLATFORM) {
auxv[i].a_val = platform_base;
- initVirtMem->writeString(platform_base, platform.c_str());
+ initVirtMem.writeString(platform_base, platform.c_str());
} else if (auxv[i].a_type == M5_AT_EXECFN) {
auxv[i].a_val = aux_data_base;
- initVirtMem->writeString(aux_data_base, filename.c_str());
+ initVirtMem.writeString(aux_data_base, filename.c_str());
}
}
//Copy the aux stuff
for (int x = 0; x < auxv.size(); x++)
{
- initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
+ initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
(uint8_t*)&(auxv[x].a_type), intSize);
- initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
+ initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
(uint8_t*)&(auxv[x].a_val), intSize);
}
//Write out the terminating zeroed auxilliary vector
const uint64_t zero = 0;
- initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
+ initVirtMem.writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
(uint8_t*)&zero, 2 * intSize);
copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
- initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
+ initVirtMem.writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
ThreadContext *tc = system->getThreadContext(contextIds[0]);
// Write out the sentry void *
uint64_t sentry_NULL = 0;
- initVirtMem->writeBlob(sentry_base,
+ initVirtMem.writeBlob(sentry_base,
(uint8_t*)&sentry_NULL, sentry_size);
// Write the file name
- initVirtMem->writeString(file_name_base, filename.c_str());
+ initVirtMem.writeString(file_name_base, filename.c_str());
// Copy the aux stuff
for (int x = 0; x < auxv.size(); x++) {
- initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
+ initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
(uint8_t*)&(auxv[x].a_type), intSize);
- initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
+ initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
(uint8_t*)&(auxv[x].a_val), intSize);
}
// Write out the terminating zeroed auxilliary vector
const IntType zero = 0;
- initVirtMem->writeBlob(auxv_array_base + intSize * 2 * auxv.size(),
+ initVirtMem.writeBlob(auxv_array_base + intSize * 2 * auxv.size(),
(uint8_t*)&zero, intSize);
- initVirtMem->writeBlob(auxv_array_base + intSize * (2 * auxv.size() + 1),
+ initVirtMem.writeBlob(auxv_array_base + intSize * (2 * auxv.size() + 1),
(uint8_t*)&zero, intSize);
copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
- initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
+ initVirtMem.writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
// Set up space for the trap handlers into the processes address space.
// Since the stack grows down and there is reserved address space abov
SparcLiveProcess::argsInit<uint64_t>(pageSize);
// Stuff the trap handlers into the process address space
- initVirtMem->writeBlob(fillStart,
+ initVirtMem.writeBlob(fillStart,
(uint8_t*)fillHandler64, sizeof(MachInst) * numFillInsts);
- initVirtMem->writeBlob(spillStart,
+ initVirtMem.writeBlob(spillStart,
(uint8_t*)spillHandler64, sizeof(MachInst) * numSpillInsts);
}
SparcLiveProcess::argsInit<uint32_t>(pageSize);
// Stuff the trap handlers into the process address space
- initVirtMem->writeBlob(fillStart,
+ initVirtMem.writeBlob(fillStart,
(uint8_t*)fillHandler32, sizeof(MachInst) * numFillInsts);
- initVirtMem->writeBlob(spillStart,
+ initVirtMem.writeBlob(spillStart,
(uint8_t*)spillHandler32, sizeof(MachInst) * numSpillInsts);
}
for (int index = 16; index < 32; index++) {
uint32_t regVal = tc->readIntReg(index);
regVal = htog(regVal);
- if (!tc->getMemProxy()->tryWriteBlob(
+ if (!tc->getMemProxy().tryWriteBlob(
sp + (index - 16) * 4, (uint8_t *)®Val, 4)) {
warn("Failed to save register to the stack when "
"flushing windows.\n");
for (int index = 16; index < 32; index++) {
IntReg regVal = tc->readIntReg(index);
regVal = htog(regVal);
- if (!tc->getMemProxy()->tryWriteBlob(
+ if (!tc->getMemProxy().tryWriteBlob(
sp + 2047 + (index - 16) * 8, (uint8_t *)®Val, 8)) {
warn("Failed to save register to the stack when "
"flushing windows.\n");
return tc->readIntReg(8 + number);
} else {
Addr sp = tc->readIntReg(StackPointerReg);
- FSTranslatingPortProxy* vp = tc->getVirtProxy();
- uint64_t arg = vp->read<uint64_t>(sp + 92 +
+ FSTranslatingPortProxy &vp = tc->getVirtProxy();
+ uint64_t arg = vp.read<uint64_t>(sp + 92 +
(number-NumArgumentRegs) * sizeof(uint64_t));
return arg;
}
int pri_context = bits(tlbdata,47,32);
// int sec_context = bits(tlbdata,63,48);
- PortProxy* mem = tc->getPhysProxy();
+ PortProxy &mem = tc->getPhysProxy();
TLB* itb = tc->getITBPtr();
TLB* dtb = tc->getDTBPtr();
TlbEntry* tbe;
dtb->GetTsbPtr(tc, addr, ctx_zero ? 0 : pri_context, tsbs);
va_tag = bits(addr, 63, 22);
for (int x = 0; x < 4; x++) {
- ttetag = betoh(mem->read<uint64_t>(tsbs[x]));
+ ttetag = betoh(mem.read<uint64_t>(tsbs[x]));
if (ttetag.valid() && ttetag.va() == va_tag) {
- uint64_t entry = mem->read<uint64_t>(tsbs[x]) + sizeof(uint64_t);
+ uint64_t entry = mem.read<uint64_t>(tsbs[x]) + sizeof(uint64_t);
// I think it's sun4v at least!
pte.populate(betoh(entry), PageTableEntry::sun4v);
DPRINTF(VtoPhys, "Virtual(%#x)->Physical(%#x) found in TTE\n",
#include "arch/x86/bios/e820.hh"
#include "arch/x86/isa_traits.hh"
-#include "mem/port.hh"
+#include "mem/port_proxy.hh"
#include "sim/byteswap.hh"
using namespace std;
using namespace X86ISA;
template<class T>
-void writeVal(T val, Port * port, Addr &addr)
+void writeVal(T val, PortProxy& proxy, Addr &addr)
{
T guestVal = htog(val);
- port->writeBlob(addr, (uint8_t *)&guestVal, sizeof(T));
+ proxy.writeBlob(addr, (uint8_t *)&guestVal, sizeof(T));
addr += sizeof(T);
}
-void X86ISA::E820Table::writeTo(Port * port, Addr countAddr, Addr addr)
+void X86ISA::E820Table::writeTo(PortProxy& proxy, Addr countAddr, Addr addr)
{
uint8_t e820Nr = entries.size();
uint8_t guestE820Nr = htog(e820Nr);
- port->writeBlob(countAddr, (uint8_t *)&guestE820Nr, sizeof(guestE820Nr));
+ proxy.writeBlob(countAddr, (uint8_t *)&guestE820Nr, sizeof(guestE820Nr));
for (int i = 0; i < e820Nr; i++) {
- writeVal(entries[i]->addr, port, addr);
- writeVal(entries[i]->size, port, addr);
- writeVal(entries[i]->type, port, addr);
+ writeVal(entries[i]->addr, proxy, addr);
+ writeVal(entries[i]->size, proxy, addr);
+ writeVal(entries[i]->type, proxy, addr);
}
}
#include "params/X86E820Table.hh"
#include "sim/sim_object.hh"
-class Port;
+class PortProxy;
namespace X86ISA
{
E820Table(Params *p) : SimObject(p), entries(p->entries)
{}
- void writeTo(Port * port, Addr countAddr, Addr addr);
+ void writeTo(PortProxy& proxy, Addr countAddr, Addr addr);
};
};
template<class T>
uint8_t
-writeOutField(PortProxy* proxy, Addr addr, T val)
+writeOutField(PortProxy& proxy, Addr addr, T val)
{
uint64_t guestVal = X86ISA::htog(val);
- proxy->writeBlob(addr, (uint8_t *)(&guestVal), sizeof(T));
+ proxy.writeBlob(addr, (uint8_t *)(&guestVal), sizeof(T));
uint8_t checkSum = 0;
while(guestVal) {
}
uint8_t
-writeOutString(PortProxy* proxy, Addr addr, string str, int length)
+writeOutString(PortProxy& proxy, Addr addr, string str, int length)
{
char cleanedString[length + 1];
cleanedString[length] = 0;
memcpy(cleanedString, str.c_str(), str.length());
memset(cleanedString + str.length(), 0, length - str.length());
}
- proxy->writeBlob(addr, (uint8_t *)(&cleanedString), length);
+ proxy.writeBlob(addr, (uint8_t *)(&cleanedString), length);
uint8_t checkSum = 0;
for (int i = 0; i < length; i++)
}
Addr
-X86ISA::IntelMP::FloatingPointer::writeOut(PortProxy* proxy, Addr addr)
+X86ISA::IntelMP::FloatingPointer::writeOut(PortProxy& proxy, Addr addr)
{
// Make sure that either a config table is present or a default
// configuration was found but not both.
uint8_t checkSum = 0;
- proxy->writeBlob(addr, (uint8_t *)signature, 4);
+ proxy.writeBlob(addr, (uint8_t *)signature, 4);
for (int i = 0; i < 4; i++)
checkSum += signature[i];
// The length of the structure in paragraphs, aka 16 byte chunks.
uint8_t length = 1;
- proxy->writeBlob(addr + 8, &length, 1);
+ proxy.writeBlob(addr + 8, &length, 1);
checkSum += length;
- proxy->writeBlob(addr + 9, &specRev, 1);
+ proxy.writeBlob(addr + 9, &specRev, 1);
checkSum += specRev;
- proxy->writeBlob(addr + 11, &defaultConfig, 1);
+ proxy.writeBlob(addr + 11, &defaultConfig, 1);
checkSum += defaultConfig;
uint32_t features2_5 = imcrPresent ? (1 << 7) : 0;
checkSum += writeOutField(proxy, addr + 12, features2_5);
checkSum = -checkSum;
- proxy->writeBlob(addr + 10, &checkSum, 1);
+ proxy.writeBlob(addr + 10, &checkSum, 1);
return 16;
}
}
Addr
-X86ISA::IntelMP::BaseConfigEntry::writeOut(PortProxy* proxy,
+X86ISA::IntelMP::BaseConfigEntry::writeOut(PortProxy& proxy,
Addr addr, uint8_t &checkSum)
{
- proxy->writeBlob(addr, &type, 1);
+ proxy.writeBlob(addr, &type, 1);
checkSum += type;
return 1;
}
{}
Addr
-X86ISA::IntelMP::ExtConfigEntry::writeOut(PortProxy* proxy,
+X86ISA::IntelMP::ExtConfigEntry::writeOut(PortProxy& proxy,
Addr addr, uint8_t &checkSum)
{
- proxy->writeBlob(addr, &type, 1);
+ proxy.writeBlob(addr, &type, 1);
checkSum += type;
- proxy->writeBlob(addr + 1, &length, 1);
+ proxy.writeBlob(addr + 1, &length, 1);
checkSum += length;
return 1;
}
const char X86ISA::IntelMP::ConfigTable::signature[] = "PCMP";
Addr
-X86ISA::IntelMP::ConfigTable::writeOut(PortProxy* proxy, Addr addr)
+X86ISA::IntelMP::ConfigTable::writeOut(PortProxy& proxy, Addr addr)
{
uint8_t checkSum = 0;
- proxy->writeBlob(addr, (uint8_t *)signature, 4);
+ proxy.writeBlob(addr, (uint8_t *)signature, 4);
for (int i = 0; i < 4; i++)
checkSum += signature[i];
// Base table length goes here but will be calculated later.
- proxy->writeBlob(addr + 6, (uint8_t *)(&specRev), 1);
+ proxy.writeBlob(addr + 6, (uint8_t *)(&specRev), 1);
checkSum += specRev;
// The checksum goes here but is still being calculated.
checkSum += writeOutField(proxy, addr + 36, localApic);
uint8_t reserved = 0;
- proxy->writeBlob(addr + 43, &reserved, 1);
+ proxy.writeBlob(addr + 43, &reserved, 1);
checkSum += reserved;
vector<BaseConfigEntry *>::iterator baseEnt;
Addr
X86ISA::IntelMP::Processor::writeOut(
- PortProxy* proxy, Addr addr, uint8_t &checkSum)
+ PortProxy& proxy, Addr addr, uint8_t &checkSum)
{
BaseConfigEntry::writeOut(proxy, addr, checkSum);
checkSum += writeOutField(proxy, addr + 1, localApicID);
checkSum += writeOutField(proxy, addr + 8, featureFlags);
uint32_t reserved = 0;
- proxy->writeBlob(addr + 12, (uint8_t *)(&reserved), 4);
- proxy->writeBlob(addr + 16, (uint8_t *)(&reserved), 4);
+ proxy.writeBlob(addr + 12, (uint8_t *)(&reserved), 4);
+ proxy.writeBlob(addr + 16, (uint8_t *)(&reserved), 4);
return 20;
}
Addr
X86ISA::IntelMP::Bus::writeOut(
- PortProxy* proxy, Addr addr, uint8_t &checkSum)
+ PortProxy& proxy, Addr addr, uint8_t &checkSum)
{
BaseConfigEntry::writeOut(proxy, addr, checkSum);
checkSum += writeOutField(proxy, addr + 1, busID);
Addr
X86ISA::IntelMP::IOAPIC::writeOut(
- PortProxy* proxy, Addr addr, uint8_t &checkSum)
+ PortProxy& proxy, Addr addr, uint8_t &checkSum)
{
BaseConfigEntry::writeOut(proxy, addr, checkSum);
checkSum += writeOutField(proxy, addr + 1, id);
Addr
X86ISA::IntelMP::IntAssignment::writeOut(
- PortProxy* proxy, Addr addr, uint8_t &checkSum)
+ PortProxy& proxy, Addr addr, uint8_t &checkSum)
{
BaseConfigEntry::writeOut(proxy, addr, checkSum);
checkSum += writeOutField(proxy, addr + 1, interruptType);
Addr
X86ISA::IntelMP::AddrSpaceMapping::writeOut(
- PortProxy* proxy, Addr addr, uint8_t &checkSum)
+ PortProxy& proxy, Addr addr, uint8_t &checkSum)
{
ExtConfigEntry::writeOut(proxy, addr, checkSum);
checkSum += writeOutField(proxy, addr + 2, busID);
Addr
X86ISA::IntelMP::BusHierarchy::writeOut(
- PortProxy* proxy, Addr addr, uint8_t &checkSum)
+ PortProxy& proxy, Addr addr, uint8_t &checkSum)
{
ExtConfigEntry::writeOut(proxy, addr, checkSum);
checkSum += writeOutField(proxy, addr + 2, busID);
checkSum += writeOutField(proxy, addr + 4, parentBus);
uint32_t reserved = 0;
- proxy->writeBlob(addr + 5, (uint8_t *)(&reserved), 3);
+ proxy.writeBlob(addr + 5, (uint8_t *)(&reserved), 3);
return length;
}
Addr
X86ISA::IntelMP::CompatAddrSpaceMod::writeOut(
- PortProxy* proxy, Addr addr, uint8_t &checkSum)
+ PortProxy& proxy, Addr addr, uint8_t &checkSum)
{
ExtConfigEntry::writeOut(proxy, addr, checkSum);
checkSum += writeOutField(proxy, addr + 2, busID);
public:
- Addr writeOut(PortProxy* proxy, Addr addr);
+ Addr writeOut(PortProxy& proxy, Addr addr);
Addr getTableAddr()
{
public:
- virtual Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
+ virtual Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum);
BaseConfigEntry(Params * p, uint8_t _type);
};
public:
- virtual Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
+ virtual Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum);
ExtConfigEntry(Params * p, uint8_t _type, uint8_t _length);
};
std::vector<ExtConfigEntry *> extEntries;
public:
- Addr writeOut(PortProxy* proxy, Addr addr);
+ Addr writeOut(PortProxy& proxy, Addr addr);
ConfigTable(Params * p);
};
uint32_t featureFlags;
public:
- Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
+ Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum);
Processor(Params * p);
};
std::string busType;
public:
- Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
+ Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum);
Bus(Params * p);
};
uint32_t address;
public:
- Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
+ Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum);
IOAPIC(Params * p);
};
uint8_t destApicIntIn;
public:
- Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
+ Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum);
IntAssignment(X86IntelMPBaseConfigEntryParams * p,
Enums::X86IntelMPInterruptType _interruptType,
uint64_t addrLength;
public:
- Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
+ Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum);
AddrSpaceMapping(Params * p);
};
uint8_t parentBus;
public:
- Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
+ Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum);
BusHierarchy(Params * p);
};
uint32_t rangeList;
public:
- Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
+ Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum);
CompatAddrSpaceMod(Params * p);
};
}
uint16_t
-X86ISA::SMBios::SMBiosStructure::writeOut(PortProxy* proxy, Addr addr)
+X86ISA::SMBios::SMBiosStructure::writeOut(PortProxy& proxy, Addr addr)
{
- proxy->writeBlob(addr, (uint8_t *)(&type), 1);
+ proxy.writeBlob(addr, (uint8_t *)(&type), 1);
uint8_t length = getLength();
- proxy->writeBlob(addr + 1, (uint8_t *)(&length), 1);
+ proxy.writeBlob(addr + 1, (uint8_t *)(&length), 1);
uint16_t handleGuest = X86ISA::htog(handle);
- proxy->writeBlob(addr + 2, (uint8_t *)(&handleGuest), 2);
+ proxy.writeBlob(addr + 2, (uint8_t *)(&handleGuest), 2);
return length + getStringLength();
}
void
X86ISA::SMBios::SMBiosStructure::writeOutStrings(
- PortProxy* proxy, Addr addr)
+ PortProxy& proxy, Addr addr)
{
std::vector<std::string>::iterator it;
Addr offset = 0;
// If there are string fields but none of them are used, that's a
// special case which is handled by this if.
if (strings.size() == 0 && stringFields) {
- proxy->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1);
+ proxy.writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1);
offset++;
} else {
for (it = strings.begin(); it != strings.end(); it++) {
- proxy->writeBlob(addr + offset,
+ proxy.writeBlob(addr + offset,
(uint8_t *)it->c_str(), it->length() + 1);
offset += it->length() + 1;
}
}
- proxy->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1);
+ proxy.writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1);
}
int
}
uint16_t
-X86ISA::SMBios::BiosInformation::writeOut(PortProxy* proxy, Addr addr)
+X86ISA::SMBios::BiosInformation::writeOut(PortProxy& proxy, Addr addr)
{
uint8_t size = SMBiosStructure::writeOut(proxy, addr);
- proxy->writeBlob(addr + 0x4, (uint8_t *)(&vendor), 1);
- proxy->writeBlob(addr + 0x5, (uint8_t *)(&version), 1);
+ proxy.writeBlob(addr + 0x4, (uint8_t *)(&vendor), 1);
+ proxy.writeBlob(addr + 0x5, (uint8_t *)(&version), 1);
uint16_t startingAddrSegmentGuest = X86ISA::htog(startingAddrSegment);
- proxy->writeBlob(addr + 0x6, (uint8_t *)(&startingAddrSegmentGuest), 2);
+ proxy.writeBlob(addr + 0x6, (uint8_t *)(&startingAddrSegmentGuest), 2);
- proxy->writeBlob(addr + 0x8, (uint8_t *)(&releaseDate), 1);
- proxy->writeBlob(addr + 0x9, (uint8_t *)(&romSize), 1);
+ proxy.writeBlob(addr + 0x8, (uint8_t *)(&releaseDate), 1);
+ proxy.writeBlob(addr + 0x9, (uint8_t *)(&romSize), 1);
uint64_t characteristicsGuest = X86ISA::htog(characteristics);
- proxy->writeBlob(addr + 0xA, (uint8_t *)(&characteristicsGuest), 8);
+ proxy.writeBlob(addr + 0xA, (uint8_t *)(&characteristicsGuest), 8);
uint16_t characteristicExtBytesGuest =
X86ISA::htog(characteristicExtBytes);
- proxy->writeBlob(addr + 0x12, (uint8_t *)(&characteristicExtBytesGuest), 2);
+ proxy.writeBlob(addr + 0x12, (uint8_t *)(&characteristicExtBytesGuest), 2);
- proxy->writeBlob(addr + 0x14, (uint8_t *)(&majorVer), 1);
- proxy->writeBlob(addr + 0x15, (uint8_t *)(&minorVer), 1);
- proxy->writeBlob(addr + 0x16, (uint8_t *)(&embContFirmwareMajor), 1);
- proxy->writeBlob(addr + 0x17, (uint8_t *)(&embContFirmwareMinor), 1);
+ proxy.writeBlob(addr + 0x14, (uint8_t *)(&majorVer), 1);
+ proxy.writeBlob(addr + 0x15, (uint8_t *)(&minorVer), 1);
+ proxy.writeBlob(addr + 0x16, (uint8_t *)(&embContFirmwareMajor), 1);
+ proxy.writeBlob(addr + 0x17, (uint8_t *)(&embContFirmwareMinor), 1);
writeOutStrings(proxy, addr + getLength());
}
void
-X86ISA::SMBios::SMBiosTable::writeOut(PortProxy* proxy, Addr addr,
+X86ISA::SMBios::SMBiosTable::writeOut(PortProxy& proxy, Addr addr,
Addr &headerSize, Addr &structSize)
{
headerSize = 0x1F;
*/
uint8_t mainChecksum = 0;
- proxy->writeBlob(addr, (uint8_t *)smbiosHeader.anchorString, 4);
+ proxy.writeBlob(addr, (uint8_t *)smbiosHeader.anchorString, 4);
for (int i = 0; i < 4; i++)
mainChecksum += smbiosHeader.anchorString[i];
// The checksum goes here, but we're figuring it out as we go.
- proxy->writeBlob(addr + 0x5,
+ proxy.writeBlob(addr + 0x5,
(uint8_t *)(&smbiosHeader.entryPointLength), 1);
mainChecksum += smbiosHeader.entryPointLength;
- proxy->writeBlob(addr + 0x6,
+ proxy.writeBlob(addr + 0x6,
(uint8_t *)(&smbiosHeader.majorVersion), 1);
mainChecksum += smbiosHeader.majorVersion;
- proxy->writeBlob(addr + 0x7,
+ proxy.writeBlob(addr + 0x7,
(uint8_t *)(&smbiosHeader.minorVersion), 1);
mainChecksum += smbiosHeader.minorVersion;
// Maximum structure size goes here, but we'll figure it out later.
- proxy->writeBlob(addr + 0xA,
+ proxy.writeBlob(addr + 0xA,
(uint8_t *)(&smbiosHeader.entryPointRevision), 1);
mainChecksum += smbiosHeader.entryPointRevision;
- proxy->writeBlob(addr + 0xB,
+ proxy.writeBlob(addr + 0xB,
(uint8_t *)(&smbiosHeader.formattedArea), 5);
for (int i = 0; i < 5; i++)
mainChecksum += smbiosHeader.formattedArea[i];
*/
uint8_t intChecksum = 0;
- proxy->writeBlob(addr + 0x10,
+ proxy.writeBlob(addr + 0x10,
(uint8_t *)smbiosHeader.intermediateHeader.anchorString, 5);
for (int i = 0; i < 5; i++)
intChecksum += smbiosHeader.intermediateHeader.anchorString[i];
uint32_t tableAddrGuest =
X86ISA::htog(smbiosHeader.intermediateHeader.tableAddr);
- proxy->writeBlob(addr + 0x18, (uint8_t *)(&tableAddrGuest), 4);
+ proxy.writeBlob(addr + 0x18, (uint8_t *)(&tableAddrGuest), 4);
for (int i = 0; i < 4; i++) {
intChecksum += tableAddrGuest;
tableAddrGuest >>= 8;
}
uint16_t numStructs = X86ISA::gtoh(structures.size());
- proxy->writeBlob(addr + 0x1C, (uint8_t *)(&numStructs), 2);
+ proxy.writeBlob(addr + 0x1C, (uint8_t *)(&numStructs), 2);
for (int i = 0; i < 2; i++) {
intChecksum += numStructs;
numStructs >>= 8;
}
- proxy->writeBlob(addr + 0x1E,
+ proxy.writeBlob(addr + 0x1E,
(uint8_t *)(&smbiosHeader.intermediateHeader.smbiosBCDRevision),
1);
intChecksum += smbiosHeader.intermediateHeader.smbiosBCDRevision;
*/
maxSize = X86ISA::htog(maxSize);
- proxy->writeBlob(addr + 0x8, (uint8_t *)(&maxSize), 2);
+ proxy.writeBlob(addr + 0x8, (uint8_t *)(&maxSize), 2);
for (int i = 0; i < 2; i++) {
mainChecksum += maxSize;
maxSize >>= 8;
// Set the checksum
mainChecksum = -mainChecksum;
- proxy->writeBlob(addr + 0x4, (uint8_t *)(&mainChecksum), 1);
+ proxy.writeBlob(addr + 0x4, (uint8_t *)(&mainChecksum), 1);
/*
* Intermediate header
uint16_t tableSize = offset;
tableSize = X86ISA::htog(tableSize);
- proxy->writeBlob(addr + 0x16, (uint8_t *)(&tableSize), 2);
+ proxy.writeBlob(addr + 0x16, (uint8_t *)(&tableSize), 2);
for (int i = 0; i < 2; i++) {
intChecksum += tableSize;
tableSize >>= 8;
}
intChecksum = -intChecksum;
- proxy->writeBlob(addr + 0x15, (uint8_t *)(&intChecksum), 1);
+ proxy.writeBlob(addr + 0x15, (uint8_t *)(&intChecksum), 1);
}
X86ISA::SMBios::BiosInformation *
return 4;
}
- virtual uint16_t writeOut(PortProxy* proxy, Addr addr);
+ virtual uint16_t writeOut(PortProxy& proxy, Addr addr);
protected:
bool stringFields;
std::vector<std::string> strings;
- void writeOutStrings(PortProxy* proxy, Addr addr);
+ void writeOutStrings(PortProxy& proxy, Addr addr);
int getStringLength();
BiosInformation(Params * p);
uint8_t getLength() { return 0x18; }
- uint16_t writeOut(PortProxy* proxy, Addr addr);
+ uint16_t writeOut(PortProxy& proxy, Addr addr);
};
class SMBiosTable : public SimObject
smbiosHeader.intermediateHeader.tableAddr = addr;
}
- void writeOut(PortProxy* proxy, Addr addr,
+ void writeOut(PortProxy& proxy, Addr addr,
Addr &headerSize, Addr &structSize);
};
int code = process->getSyscallArg(tc, index);
uint64_t addr = process->getSyscallArg(tc, index);
uint64_t fsBase, gsBase;
- SETranslatingPortProxy* p = tc->getMemProxy();
+ SETranslatingPortProxy &p = tc->getMemProxy();
switch(code)
{
//Each of these valid options should actually check addr.
return 0;
case GetFS:
fsBase = tc->readMiscRegNoEffect(MISCREG_FS_BASE);
- p->write(addr, fsBase);
+ p.write(addr, fsBase);
return 0;
case SetGS:
tc->setMiscRegNoEffect(MISCREG_GS_BASE, addr);
return 0;
case GetGS:
gsBase = tc->readMiscRegNoEffect(MISCREG_GS_BASE);
- p->write(addr, gsBase);
+ p.write(addr, gsBase);
return 0;
default:
return -EINVAL;
// The location of the real mode data structure.
const Addr realModeData = 0x90200;
- // A port proxy to write to memory.
- PortProxy* physProxy = threadContexts[0]->getPhysProxy();
-
/*
* Deal with the command line stuff.
*/
if (commandLine.length() + 1 > realModeData - commandLineBuff)
panic("Command line \"%s\" is longer than %d characters.\n",
commandLine, realModeData - commandLineBuff - 1);
- physProxy->writeBlob(commandLineBuff,
- (uint8_t *)commandLine.c_str(), commandLine.length() + 1);
+ physProxy.writeBlob(commandLineBuff, (uint8_t *)commandLine.c_str(),
+ commandLine.length() + 1);
// Generate a pointer of the right size and endianness to put into
// commandLinePointer.
uint32_t guestCommandLineBuff =
X86ISA::htog((uint32_t)commandLineBuff);
- physProxy->writeBlob(commandLinePointer,
- (uint8_t *)&guestCommandLineBuff, sizeof(guestCommandLineBuff));
+ physProxy.writeBlob(commandLinePointer, (uint8_t *)&guestCommandLineBuff,
+ sizeof(guestCommandLineBuff));
/*
* Screen Info.
// A pointer to the buffer for E820 entries.
const Addr e820MapPointer = realModeData + 0x2d0;
- e820Table->writeTo(getSystemPort(), e820MapNrPointer, e820MapPointer);
+ e820Table->writeTo(physProxy, e820MapNrPointer, e820MapPointer);
/*
* Pass the location of the real mode data structure to the kernel
0x0f,0x05, // syscall
0xc3 // retq
};
- initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vtimeOffset,
+ initVirtMem.writeBlob(vsyscallPage.base + vsyscallPage.vtimeOffset,
vtimeBlob, sizeof(vtimeBlob));
uint8_t vgettimeofdayBlob[] = {
0x0f,0x05, // syscall
0xc3 // retq
};
- initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vgettimeofdayOffset,
+ initVirtMem.writeBlob(vsyscallPage.base + vsyscallPage.vgettimeofdayOffset,
vgettimeofdayBlob, sizeof(vgettimeofdayBlob));
for (int i = 0; i < contextIds.size(); i++) {
assert(_gdtSize % sizeof(zero) == 0);
for (Addr gdtCurrent = _gdtStart;
gdtCurrent < _gdtStart + _gdtSize; gdtCurrent += sizeof(zero)) {
- initVirtMem->write(gdtCurrent, zero);
+ initVirtMem.write(gdtCurrent, zero);
}
// Set up the vsyscall page for this process.
0x89, 0xe5, // mov %esp, %ebp
0x0f, 0x34 // sysenter
};
- initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsyscallOffset,
+ initVirtMem.writeBlob(vsyscallPage.base + vsyscallPage.vsyscallOffset,
vsyscallBlob, sizeof(vsyscallBlob));
uint8_t vsysexitBlob[] = {
0x59, // pop %ecx
0xc3 // ret
};
- initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsysexitOffset,
+ initVirtMem.writeBlob(vsyscallPage.base + vsyscallPage.vsysexitOffset,
vsysexitBlob, sizeof(vsysexitBlob));
for (int i = 0; i < contextIds.size(); i++) {
//Write out the sentry void *
IntType sentry_NULL = 0;
- initVirtMem->writeBlob(sentry_base,
+ initVirtMem.writeBlob(sentry_base,
(uint8_t*)&sentry_NULL, sentry_size);
//Write the file name
- initVirtMem->writeString(file_name_base, filename.c_str());
+ initVirtMem.writeString(file_name_base, filename.c_str());
//Fix up the aux vectors which point to data
assert(auxv[auxv.size() - 3].a_type == M5_AT_RANDOM);
//Copy the aux stuff
for(int x = 0; x < auxv.size(); x++)
{
- initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
+ initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
(uint8_t*)&(auxv[x].a_type), intSize);
- initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
+ initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
(uint8_t*)&(auxv[x].a_val), intSize);
}
//Write out the terminating zeroed auxilliary vector
const uint64_t zero = 0;
- initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
+ initVirtMem.writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
(uint8_t*)&zero, 2 * intSize);
- initVirtMem->writeString(aux_data_base, platform.c_str());
+ initVirtMem.writeString(aux_data_base, platform.c_str());
copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
- initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
+ initVirtMem.writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
ThreadContext *tc = system->getThreadContext(contextIds[0]);
//Set the stack pointer register
{
Addr addr = 0;
- FSTranslatingPortProxy* vp;
-
- vp = tc->getVirtProxy();
+ FSTranslatingPortProxy &vp = tc->getVirtProxy();
if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_size", addr))
panic("thread info not compiled into kernel\n");
- thread_info_size = vp->readGtoH<int32_t>(addr);
+ thread_info_size = vp.readGtoH<int32_t>(addr);
if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_size", addr))
panic("thread info not compiled into kernel\n");
- task_struct_size = vp->readGtoH<int32_t>(addr);
+ task_struct_size = vp.readGtoH<int32_t>(addr);
if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_task", addr))
panic("thread info not compiled into kernel\n");
- task_off = vp->readGtoH<int32_t>(addr);
+ task_off = vp.readGtoH<int32_t>(addr);
if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_pid", addr))
panic("thread info not compiled into kernel\n");
- pid_off = vp->readGtoH<int32_t>(addr);
+ pid_off = vp.readGtoH<int32_t>(addr);
if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_comm", addr))
panic("thread info not compiled into kernel\n");
- name_off = vp->readGtoH<int32_t>(addr);
+ name_off = vp.readGtoH<int32_t>(addr);
}
Addr
Addr tsk;
- FSTranslatingPortProxy* vp;
-
- vp = tc->getVirtProxy();
- tsk = vp->readGtoH<Addr>(base + task_off);
+ FSTranslatingPortProxy &vp = tc->getVirtProxy();
+ tsk = vp.readGtoH<Addr>(base + task_off);
return tsk;
}
uint16_t pd;
- FSTranslatingPortProxy* vp;
-
- vp = tc->getVirtProxy();
- pd = vp->readGtoH<uint16_t>(task + pid_off);
+ FSTranslatingPortProxy &vp = tc->getVirtProxy();
+ pd = vp.readGtoH<uint16_t>(task + pid_off);
return pd;
}
const int PDPTBits = 9;
const int PDTBits = 9;
- // Get a port proxy to write the page tables and descriptor tables.
- PortProxy* physProxy = tc->getPhysProxy();
-
/*
* Set up the gdt.
*/
uint8_t numGDTEntries = 0;
// Place holder at selector 0
uint64_t nullDescriptor = 0;
- physProxy->writeBlob(GDTBase + numGDTEntries * 8,
- (uint8_t *)(&nullDescriptor), 8);
+ physProxy.writeBlob(GDTBase + numGDTEntries * 8,
+ (uint8_t *)(&nullDescriptor), 8);
numGDTEntries++;
//64 bit code segment
//it's beginning in memory and it's actual data, we'll use an
//intermediary.
uint64_t csDescVal = csDesc;
- physProxy->writeBlob(GDTBase + numGDTEntries * 8,
- (uint8_t *)(&csDescVal), 8);
+ physProxy.writeBlob(GDTBase + numGDTEntries * 8,
+ (uint8_t *)(&csDescVal), 8);
numGDTEntries++;
dsDesc.limitHigh = 0xF;
dsDesc.limitLow = 0xFF;
uint64_t dsDescVal = dsDesc;
- physProxy->writeBlob(GDTBase + numGDTEntries * 8,
- (uint8_t *)(&dsDescVal), 8);
+ physProxy.writeBlob(GDTBase + numGDTEntries * 8,
+ (uint8_t *)(&dsDescVal), 8);
numGDTEntries++;
tssDesc.limitHigh = 0xF;
tssDesc.limitLow = 0xFF;
uint64_t tssDescVal = tssDesc;
- physProxy->writeBlob(GDTBase + numGDTEntries * 8,
- (uint8_t *)(&tssDescVal), 8);
+ physProxy.writeBlob(GDTBase + numGDTEntries * 8,
+ (uint8_t *)(&tssDescVal), 8);
numGDTEntries++;
// read/write, user, not present
uint64_t pml4e = X86ISA::htog(0x6);
for (int offset = 0; offset < (1 << PML4Bits) * 8; offset += 8) {
- physProxy->writeBlob(PageMapLevel4 + offset, (uint8_t *)(&pml4e), 8);
+ physProxy.writeBlob(PageMapLevel4 + offset, (uint8_t *)(&pml4e), 8);
}
// Point to the only PDPT
pml4e = X86ISA::htog(0x7 | PageDirPtrTable);
- physProxy->writeBlob(PageMapLevel4, (uint8_t *)(&pml4e), 8);
+ physProxy.writeBlob(PageMapLevel4, (uint8_t *)(&pml4e), 8);
// Page Directory Pointer Table
// read/write, user, not present
uint64_t pdpe = X86ISA::htog(0x6);
for (int offset = 0; offset < (1 << PDPTBits) * 8; offset += 8) {
- physProxy->writeBlob(PageDirPtrTable + offset,
- (uint8_t *)(&pdpe), 8);
+ physProxy.writeBlob(PageDirPtrTable + offset,
+ (uint8_t *)(&pdpe), 8);
}
// Point to the PDTs
for (int table = 0; table < NumPDTs; table++) {
pdpe = X86ISA::htog(0x7 | PageDirTable[table]);
- physProxy->writeBlob(PageDirPtrTable + table * 8,
- (uint8_t *)(&pdpe), 8);
+ physProxy.writeBlob(PageDirPtrTable + table * 8,
+ (uint8_t *)(&pdpe), 8);
}
// Page Directory Tables
for (int offset = 0; offset < (1 << PDTBits) * 8; offset += 8) {
// read/write, user, present, 4MB
uint64_t pdte = X86ISA::htog(0x87 | base);
- physProxy->writeBlob(PageDirTable[table] + offset,
- (uint8_t *)(&pdte), 8);
+ physProxy.writeBlob(PageDirTable[table] + offset,
+ (uint8_t *)(&pdte), 8);
base += pageSize;
}
}
X86System::writeOutSMBiosTable(Addr header,
Addr &headerSize, Addr &structSize, Addr table)
{
- // Get a port proxy to write the table and header to memory.
- PortProxy* physProxy = threadContexts[0]->getPhysProxy();
-
// If the table location isn't specified, just put it after the header.
// The header size as of the 2.5 SMBios specification is 0x1F bytes
if (!table)
X86System::writeOutMPTable(Addr fp,
Addr &fpSize, Addr &tableSize, Addr table)
{
- // Get a port proxy to write the table and header to memory.
- PortProxy* physProxy = threadContexts[0]->getPhysProxy();
-
// If the table location isn't specified and it exists, just put
// it after the floating pointer. The fp size as of the 1.4 Intel MP
// specification is 0x10 bytes.
}
bool
-ElfObject::loadSections(PortProxy* memProxy, Addr addrMask)
+ElfObject::loadSections(PortProxy& memProxy, Addr addrMask)
{
if (!ObjectFile::loadSections(memProxy, addrMask))
return false;
public:
virtual ~ElfObject() {}
- bool loadSections(PortProxy *memProxy,
+ bool loadSections(PortProxy& memProxy,
Addr addrMask = std::numeric_limits<Addr>::max());
virtual bool loadGlobalSymbols(SymbolTable *symtab, Addr addrMask =
std::numeric_limits<Addr>::max());
}
bool
-HexFile::loadSections(PortProxy* memProxy)
+HexFile::loadSections(PortProxy& memProxy)
{
char Line[64];
Addr MemAddr;
parseLine(Line, &MemAddr, &Data);
if (MemAddr != 0) {
// Now, write to memory
- memProxy->writeBlob(MemAddr << 2, (uint8_t *)&Data, sizeof(Data));
+ memProxy.writeBlob(MemAddr << 2, (uint8_t *)&Data, sizeof(Data));
}
}
return true;
virtual ~HexFile();
void close();
- bool loadSections(PortProxy* memProxy);
+ bool loadSections(PortProxy& memProxy);
};
#endif // __BASE_LOADER_HEX_FILE_HH__
bool
-ObjectFile::loadSection(Section *sec, PortProxy* memProxy, Addr addrMask)
+ObjectFile::loadSection(Section *sec, PortProxy& memProxy, Addr addrMask)
{
if (sec->size != 0) {
Addr addr = sec->baseAddr & addrMask;
if (sec->fileImage) {
- memProxy->writeBlob(addr, sec->fileImage, sec->size);
+ memProxy.writeBlob(addr, sec->fileImage, sec->size);
}
else {
// no image: must be bss
- memProxy->memsetBlob(addr, 0, sec->size);
+ memProxy.memsetBlob(addr, 0, sec->size);
}
}
return true;
bool
-ObjectFile::loadSections(PortProxy* memProxy, Addr addrMask)
+ObjectFile::loadSections(PortProxy& memProxy, Addr addrMask)
{
return (loadSection(&text, memProxy, addrMask)
&& loadSection(&data, memProxy, addrMask)
void close();
- virtual bool loadSections(PortProxy *memProxy, Addr addrMask =
+ virtual bool loadSections(PortProxy& memProxy, Addr addrMask =
std::numeric_limits<Addr>::max());
virtual bool loadGlobalSymbols(SymbolTable *symtab, Addr addrMask =
std::numeric_limits<Addr>::max()) = 0;
Section data;
Section bss;
- bool loadSection(Section *sec, PortProxy* memProxy, Addr addrMask);
+ bool loadSection(Section *sec, PortProxy& memProxy, Addr addrMask);
void setGlobalPointer(Addr global_ptr) { globalPtr = global_ptr; }
public:
DPRINTF(GDBRead, "read: addr=%#x, size=%d", vaddr, size);
if (FullSystem) {
- FSTranslatingPortProxy *port = context->getVirtProxy();
- port->readBlob(vaddr, (uint8_t*)data, size);
+ FSTranslatingPortProxy &proxy = context->getVirtProxy();
+ proxy.readBlob(vaddr, (uint8_t*)data, size);
} else {
- SETranslatingPortProxy *port = context->getMemProxy();
- port->readBlob(vaddr, (uint8_t*)data, size);
+ SETranslatingPortProxy &proxy = context->getMemProxy();
+ proxy.readBlob(vaddr, (uint8_t*)data, size);
}
#if TRACING_ON
DPRINTFNR("\n");
}
if (FullSystem) {
- FSTranslatingPortProxy *port = context->getVirtProxy();
- port->writeBlob(vaddr, (uint8_t*)data, size);
+ FSTranslatingPortProxy &proxy = context->getVirtProxy();
+ proxy.writeBlob(vaddr, (uint8_t*)data, size);
} else {
- SETranslatingPortProxy *port = context->getMemProxy();
- port->writeBlob(vaddr, (uint8_t*)data, size);
- delete port;
+ SETranslatingPortProxy &proxy = context->getMemProxy();
+ proxy.writeBlob(vaddr, (uint8_t*)data, size);
}
return true;
Process *getProcessPtr() { return actualTC->getProcessPtr(); }
- PortProxy* getPhysProxy() { return actualTC->getPhysProxy(); }
+ PortProxy &getPhysProxy() { return actualTC->getPhysProxy(); }
- FSTranslatingPortProxy* getVirtProxy()
+ FSTranslatingPortProxy &getVirtProxy()
{ return actualTC->getVirtProxy(); }
//XXX: How does this work now?
actualTC->connectMemPorts(tc);
}
- SETranslatingPortProxy* getMemProxy() { return actualTC->getMemProxy(); }
+ SETranslatingPortProxy &getMemProxy() { return actualTC->getMemProxy(); }
/** Executes a syscall in SE mode. */
void syscall(int64_t callnum)
using namespace TheISA;
-FSTranslatingPortProxy*
+FSTranslatingPortProxy&
InOrderThreadContext::getVirtProxy()
{
return thread->getVirtProxy();
TheISA::Kernel::Statistics *getKernelStats()
{ return thread->kernelStats; }
- PortProxy* getPhysProxy() { return thread->getPhysProxy(); }
+ PortProxy &getPhysProxy() { return thread->getPhysProxy(); }
- FSTranslatingPortProxy* getVirtProxy();
+ FSTranslatingPortProxy &getVirtProxy();
void initMemProxies(ThreadContext *tc)
{ thread->initMemProxies(tc); }
return this->thread->quiesceEvent;
}
- SETranslatingPortProxy* getMemProxy() { return thread->getMemProxy(); }
+ SETranslatingPortProxy &getMemProxy() { return thread->getMemProxy(); }
/** Returns a pointer to this thread's process. */
Process *getProcessPtr() { return thread->getProcessPtr(); }
/** Returns a pointer to this thread's process. */
virtual Process *getProcessPtr() { return thread->getProcessPtr(); }
- virtual PortProxy* getPhysProxy() { return thread->getPhysProxy(); }
+ virtual PortProxy &getPhysProxy() { return thread->getPhysProxy(); }
- virtual FSTranslatingPortProxy* getVirtProxy();
+ virtual FSTranslatingPortProxy &getVirtProxy();
virtual void initMemProxies(ThreadContext *tc)
{ thread->initMemProxies(tc); }
- virtual SETranslatingPortProxy* getMemProxy()
+ virtual SETranslatingPortProxy &getMemProxy()
{ return thread->getMemProxy(); }
/** Returns this thread's status. */
#include "debug/O3CPU.hh"
template <class Impl>
-FSTranslatingPortProxy*
+FSTranslatingPortProxy&
O3ThreadContext<Impl>::getVirtProxy()
{
return thread->getVirtProxy();
Process *getProcessPtr() { return thread->getProcessPtr(); }
- PortProxy* getPhysProxy() { return thread->getPhysProxy(); }
+ PortProxy &getPhysProxy() { return thread->getPhysProxy(); }
- FSTranslatingPortProxy* getVirtProxy()
+ FSTranslatingPortProxy &getVirtProxy()
{ return thread->getVirtProxy(); }
- SETranslatingPortProxy* getMemProxy() { return thread->getMemProxy(); }
+ SETranslatingPortProxy &getMemProxy() { return thread->getMemProxy(); }
Status status() const { return thread->status(); }
System *getSystemPtr() { return system; }
- PortProxy* getPhysProxy() { return physProxy; }
-
- /** Return a virtual port. This port cannot be cached locally in an object.
- * After a CPU switch it may point to the wrong memory object which could
- * mean stale data.
- */
- FSTranslatingPortProxy* getVirtProxy() { return virtProxy; }
-
Status status() const { return _status; }
void setStatus(Status newStatus) { _status = newStatus; }
virtual TheISA::Kernel::Statistics *getKernelStats() = 0;
- virtual PortProxy* getPhysProxy() = 0;
+ virtual PortProxy &getPhysProxy() = 0;
- virtual FSTranslatingPortProxy* getVirtProxy() = 0;
+ virtual FSTranslatingPortProxy &getVirtProxy() = 0;
/**
* Initialise the physical and virtual port proxies and tie them to
*/
virtual void initMemProxies(ThreadContext *tc) = 0;
- virtual SETranslatingPortProxy *getMemProxy() = 0;
+ virtual SETranslatingPortProxy &getMemProxy() = 0;
virtual Process *getProcessPtr() = 0;
TheISA::Kernel::Statistics *getKernelStats()
{ return actualTC->getKernelStats(); }
- PortProxy* getPhysProxy() { return actualTC->getPhysProxy(); }
+ PortProxy &getPhysProxy() { return actualTC->getPhysProxy(); }
- FSTranslatingPortProxy* getVirtProxy() { return actualTC->getVirtProxy(); }
+ FSTranslatingPortProxy &getVirtProxy() { return actualTC->getVirtProxy(); }
void initMemProxies(ThreadContext *tc) { actualTC->initMemProxies(tc); }
- SETranslatingPortProxy* getMemProxy() { return actualTC->getMemProxy(); }
+ SETranslatingPortProxy &getMemProxy() { return actualTC->getMemProxy(); }
Process *getProcessPtr() { return actualTC->getProcessPtr(); }
// (i.e. due to restoring from a checkpoint and later switching
// in.
if (physProxy == NULL)
+ // this cannot be done in the constructor as the thread state
+ // itself is created in the base cpu constructor and the
+ // getPort is a virtual function at the moment
physProxy = new PortProxy(baseCpu->getDataPort());
if (virtProxy == NULL)
virtProxy = new FSTranslatingPortProxy(tc);
profile->sample(profileNode, profilePC);
}
-SETranslatingPortProxy *
+SETranslatingPortProxy &
ThreadState::getMemProxy()
{
- if (proxy != NULL)
- return proxy;
-
- /* Use this port proxy to for syscall emulation writes to memory. */
- proxy = new SETranslatingPortProxy(*process->system->getSystemPort(),
- process,
- SETranslatingPortProxy::NextPage);
-
- return proxy;
+ if (proxy == NULL)
+ proxy = new SETranslatingPortProxy(baseCpu->getDataPort(),
+ process,
+ SETranslatingPortProxy::NextPage);
+ return *proxy;
}
};
class Checkpoint;
-class PortProxy;
-class SETranslatingPort;
-class FSTranslatingPort;
/**
* Struct for holding general thread state that is needed across CPU
TheISA::Kernel::Statistics *getKernelStats() { return kernelStats; }
- PortProxy* getPhysProxy() { return physProxy; }
+ PortProxy &getPhysProxy() { return *physProxy; }
- FSTranslatingPortProxy* getVirtProxy() { return virtProxy; }
+ FSTranslatingPortProxy &getVirtProxy() { return *virtProxy; }
Process *getProcessPtr() { return process; }
- SETranslatingPortProxy* getMemProxy();
+ SETranslatingPortProxy &getMemProxy();
/** Reads the number of instructions functionally executed and
* committed.
/** A translating port proxy, outgoing only, for functional
* accesse to virtual addresses. */
- FSTranslatingPortProxy* virtProxy;
- SETranslatingPortProxy* proxy;
+ FSTranslatingPortProxy *virtProxy;
+ SETranslatingPortProxy *proxy;
public:
/*
for (int i = 0, j = 0; i < count; i += SectorSize, j++)
image->read(data + i, block + j);
- system->physProxy->writeBlob(addr, data, count);
+ system->physProxy.writeBlob(addr, data, count);
DPRINTF(SimpleDisk, "read block=%#x len=%d\n", (uint64_t)block, count);
DDUMP(SimpleDiskData, data, count);
/// memory space. Used by statfs() and fstatfs().
template <class T>
static void
- copyOutStatfsBuf(SETranslatingPortProxy *mem, Addr addr,
+ copyOutStatfsBuf(SETranslatingPortProxy &mem, Addr addr,
global_statfs *host)
{
using namespace TheISA;
typedef F64_stat tgt_stat;
/*
- static void copyOutStatBuf(SETranslatingPortProxy *mem, Addr addr,
+ static void copyOutStatBuf(SETranslatingPortProxy &mem, Addr addr,
global_stat *host)
{
Tru64::copyOutStatBuf<Tru64::F64_stat>(mem, addr, host);
}*/
- static void copyOutStatfsBuf(SETranslatingPortProxy *mem, Addr addr,
+ static void copyOutStatfsBuf(SETranslatingPortProxy &mem, Addr addr,
global_statfs *host)
{
Tru64::copyOutStatfsBuf<Tru64::F64_statfs>(mem, addr, host);
typedef pre_F64_stat tgt_stat;
/*
- static void copyOutStatBuf(SETranslatingPortProxy *mem, Addr addr,
+ static void copyOutStatBuf(SETranslatingPortProxy &mem, Addr addr,
global_stat *host)
{
Tru64::copyOutStatBuf<Tru64::pre_F64_stat>(mem, addr, host);
}*/
- static void copyOutStatfsBuf(SETranslatingPortProxy *mem, Addr addr,
+ static void copyOutStatfsBuf(SETranslatingPortProxy &mem, Addr addr,
global_statfs *host)
{
Tru64::copyOutStatfsBuf<Tru64::pre_F64_statfs>(mem, addr, host);
CopyOut(ThreadContext *tc, void *dest, Addr src, size_t cplen)
{
uint8_t *dst = (uint8_t *)dest;
- FSTranslatingPortProxy* vp = tc->getVirtProxy();
-
- vp->readBlob(src, dst, cplen);
+ tc->getVirtProxy().readBlob(src, dst, cplen);
}
void
CopyIn(ThreadContext *tc, Addr dest, void *source, size_t cplen)
{
uint8_t *src = (uint8_t *)source;
- FSTranslatingPortProxy* vp = tc->getVirtProxy();
-
- vp->writeBlob(dest, src, cplen);
+ tc->getVirtProxy().writeBlob(dest, src, cplen);
}
void
CopyStringOut(ThreadContext *tc, char *dst, Addr vaddr, size_t maxlen)
{
char *start = dst;
- FSTranslatingPortProxy* vp = tc->getVirtProxy();
+ FSTranslatingPortProxy &vp = tc->getVirtProxy();
bool foundNull = false;
while ((dst - start + 1) < maxlen && !foundNull) {
- vp->readBlob(vaddr++, (uint8_t*)dst, 1);
+ vp.readBlob(vaddr++, (uint8_t*)dst, 1);
if (dst == '\0')
foundNull = true;
dst++;
void
CopyStringIn(ThreadContext *tc, char *src, Addr vaddr)
{
- FSTranslatingPortProxy* vp = tc->getVirtProxy();
+ FSTranslatingPortProxy &vp = tc->getVirtProxy();
for (ChunkGenerator gen(vaddr, strlen(src), TheISA::PageBytes); !gen.done();
- gen.next())
+ gen.next())
{
- vp->writeBlob(gen.addr(), (uint8_t*)src, gen.size());
+ vp.writeBlob(gen.addr(), (uint8_t*)src, gen.size());
src += gen.size();
}
}
#include "mem/page_table.hh"
#include "mem/port_proxy.hh"
-#include "sim/process.hh"
+
+class Process;
/**
* @file
/*
+ * Copyright (c) 2012 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
* Copyright (c) 2001-2005 The Regents of The University of Michigan
* All rights reserved.
*
#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
#include "mem/page_table.hh"
-#include "mem/physical.hh"
#include "mem/se_translating_port_proxy.hh"
#include "params/LiveProcess.hh"
#include "params/Process.hh"
Process::Process(ProcessParams * params)
: SimObject(params), system(params->system),
- max_stack_size(params->max_stack_size)
+ max_stack_size(params->max_stack_size),
+ M5_pid(system->allocatePID()),
+ pTable(new PageTable(name(), M5_pid)),
+ initVirtMem(system->getSystemPort(), this,
+ SETranslatingPortProxy::Always)
{
string in = params->input;
string out = params->output;
else
stderr_fd = Process::openOutputFile(err);
- M5_pid = system->allocatePID();
// initialize first 3 fds (stdin, stdout, stderr)
Process::FdMap *fdo = &fd_map[STDIN_FILENO];
fdo->fd = stdin_fd;
mmap_start = mmap_end = 0;
nxm_start = nxm_end = 0;
- pTable = new PageTable(name(), M5_pid);
// other parameters will be initialized when the program is loaded
}
// mark this context as active so it will start ticking.
tc->activate(0);
-
- initVirtMem = new SETranslatingPortProxy(*system->getSystemPort(), this,
- SETranslatingPortProxy::Always);
}
// map simulator fd sim_fd to target fd tgt_fd
#include "base/statistics.hh"
#include "base/types.hh"
#include "config/the_isa.hh"
+#include "mem/se_translating_port_proxy.hh"
#include "sim/sim_object.hh"
#include "sim/syscallreturn.hh"
class SyscallDesc;
class System;
class ThreadContext;
-class SETranslatingPortProxy;
template<class IntType>
struct AuxVector
virtual void initState();
- protected:
- /// Memory object for initialization (image loading)
- SETranslatingPortProxy *initVirtMem;
-
public:
- PageTable *pTable;
//This id is assigned by m5 and is used to keep process' tlb entries
//separated.
uint64_t M5_pid;
+ PageTable* pTable;
+
class FdMap
{
public:
void unserialize(Checkpoint *cp, const std::string §ion);
};
+ protected:
+ /// Memory proxy for initialization (image loading)
+ SETranslatingPortProxy initVirtMem;
+
private:
// file descriptor remapping support
static const int MAX_FD = 256; // max legal fd value
void
copyStringArray(std::vector<std::string> &strings,
AddrType array_ptr, AddrType data_ptr,
- SETranslatingPortProxy* memProxy)
+ SETranslatingPortProxy& memProxy)
{
AddrType data_ptr_swap;
for (std::vector<std::string>::size_type i = 0; i < strings.size(); ++i) {
data_ptr_swap = TheISA::htog(data_ptr);
- memProxy->writeBlob(array_ptr, (uint8_t*)&data_ptr_swap,
+ memProxy.writeBlob(array_ptr, (uint8_t*)&data_ptr_swap,
sizeof(AddrType));
- memProxy->writeString(data_ptr, strings[i].c_str());
+ memProxy.writeString(data_ptr, strings[i].c_str());
array_ptr += sizeof(AddrType);
data_ptr += strings[i].size() + 1;
}
// add NULL terminator
data_ptr = 0;
- memProxy->writeBlob(array_ptr, (uint8_t*)&data_ptr, sizeof(AddrType));
+ memProxy.writeBlob(array_ptr, (uint8_t*)&data_ptr, sizeof(AddrType));
}
#endif
// if the address is already there, zero it out
else {
uint8_t zero = 0;
- SETranslatingPortProxy *tp = tc->getMemProxy();
+ SETranslatingPortProxy &tp = tc->getMemProxy();
// split non-page aligned accesses
Addr next_page = roundUp(gen.addr(), VMPageSize);
uint32_t size_needed = next_page - gen.addr();
- tp->memsetBlob(gen.addr(), zero, size_needed);
+ tp.memsetBlob(gen.addr(), zero, size_needed);
if (gen.addr() + VMPageSize > next_page &&
next_page < new_brk &&
p->pTable->translate(next_page))
{
size_needed = VMPageSize - size_needed;
- tp->memsetBlob(next_page, zero, size_needed);
+ tp.memsetBlob(next_page, zero, size_needed);
}
}
}
string path;
int index = 0;
- if (!tc->getMemProxy()->tryReadString(path, p->getSyscallArg(tc, index)))
+ if (!tc->getMemProxy().tryReadString(path, p->getSyscallArg(tc, index)))
return (TheISA::IntReg)-EFAULT;
// Adjust path for current working directory
string path;
int index = 0;
- if (!tc->getMemProxy()->tryReadString(path, p->getSyscallArg(tc, index)))
+ if (!tc->getMemProxy().tryReadString(path, p->getSyscallArg(tc, index)))
return (TheISA::IntReg)-EFAULT;
// Adjust path for current working directory
string path;
int index = 0;
- if (!tc->getMemProxy()->tryReadString(path, p->getSyscallArg(tc, index)))
+ if (!tc->getMemProxy().tryReadString(path, p->getSyscallArg(tc, index)))
return (TheISA::IntReg)-EFAULT;
// Adjust path for current working directory
string old_name;
int index = 0;
- if (!tc->getMemProxy()->tryReadString(old_name, p->getSyscallArg(tc, index)))
+ if (!tc->getMemProxy().tryReadString(old_name, p->getSyscallArg(tc, index)))
return -EFAULT;
string new_name;
- if (!tc->getMemProxy()->tryReadString(new_name, p->getSyscallArg(tc, index)))
+ if (!tc->getMemProxy().tryReadString(new_name, p->getSyscallArg(tc, index)))
return -EFAULT;
// Adjust path for current working directory
string path;
int index = 0;
- if (!tc->getMemProxy()->tryReadString(path, p->getSyscallArg(tc, index)))
+ if (!tc->getMemProxy().tryReadString(path, p->getSyscallArg(tc, index)))
return -EFAULT;
off_t length = p->getSyscallArg(tc, index);
int index = 0;
string path;
- if (!tc->getMemProxy()->tryReadString(path, process->getSyscallArg(tc, index)))
+ if (!tc->getMemProxy().tryReadString(path, process->getSyscallArg(tc, index)))
return -EFAULT;
int64_t length = process->getSyscallArg(tc, index, 64);
string path;
int index = 0;
- if (!tc->getMemProxy()->tryReadString(path, p->getSyscallArg(tc, index)))
+ if (!tc->getMemProxy().tryReadString(path, p->getSyscallArg(tc, index)))
return -EFAULT;
/* XXX endianess */
//
// copy data into simulator space (read from target memory)
//
- virtual bool copyIn(SETranslatingPortProxy* memproxy)
+ virtual bool copyIn(SETranslatingPortProxy &memproxy)
{
- memproxy->readBlob(addr, bufPtr, size);
+ memproxy.readBlob(addr, bufPtr, size);
return true; // no EFAULT detection for now
}
//
// copy data out of simulator space (write to target memory)
//
- virtual bool copyOut(SETranslatingPortProxy* memproxy)
+ virtual bool copyOut(SETranslatingPortProxy &memproxy)
{
- memproxy->writeBlob(addr, bufPtr, size);
+ memproxy.writeBlob(addr, bufPtr, size);
return true; // no EFAULT detection for now
}
//Here are a couple convenience functions
template<class OS>
static void
-copyOutStatBuf(SETranslatingPortProxy* mem, Addr addr,
+copyOutStatBuf(SETranslatingPortProxy &mem, Addr addr,
hst_stat *host, bool fakeTTY = false)
{
typedef TypedBufferArg<typename OS::tgt_stat> tgt_stat_buf;
template<class OS>
static void
-copyOutStat64Buf(SETranslatingPortProxy* mem, Addr addr,
+copyOutStat64Buf(SETranslatingPortProxy &mem, Addr addr,
hst_stat64 *host, bool fakeTTY = false)
{
typedef TypedBufferArg<typename OS::tgt_stat64> tgt_stat_buf;
std::string path;
int index = 0;
- if (!tc->getMemProxy()->tryReadString(path,
+ if (!tc->getMemProxy().tryReadString(path,
process->getSyscallArg(tc, index)))
return -EFAULT;
std::string path;
int index = 0;
- if (!tc->getMemProxy()->tryReadString(path,
+ if (!tc->getMemProxy().tryReadString(path,
process->getSyscallArg(tc, index))) {
return -EFAULT;
}
std::string path;
int index = 0;
- if (!tc->getMemProxy()->tryReadString(path,
+ if (!tc->getMemProxy().tryReadString(path,
process->getSyscallArg(tc, index))) {
return -EFAULT;
}
std::string path;
int index = 0;
- if (!tc->getMemProxy()->tryReadString(path,
+ if (!tc->getMemProxy().tryReadString(path,
process->getSyscallArg(tc, index)))
return -EFAULT;
Addr bufPtr = process->getSyscallArg(tc, index);
std::string path;
int index = 0;
- if (!tc->getMemProxy()->tryReadString(path,
+ if (!tc->getMemProxy().tryReadString(path,
process->getSyscallArg(tc, index))) {
return -EFAULT;
}
std::string path;
int index = 0;
- if (!tc->getMemProxy()->tryReadString(path,
+ if (!tc->getMemProxy().tryReadString(path,
process->getSyscallArg(tc, index))) {
return -EFAULT;
}
std::string path;
int index = 0;
- if (!tc->getMemProxy()->tryReadString(path,
+ if (!tc->getMemProxy().tryReadString(path,
process->getSyscallArg(tc, index))) {
return -EFAULT;
}
return -EBADF;
}
- SETranslatingPortProxy *p = tc->getMemProxy();
+ SETranslatingPortProxy &p = tc->getMemProxy();
uint64_t tiov_base = process->getSyscallArg(tc, index);
size_t count = process->getSyscallArg(tc, index);
struct iovec hiov[count];
for (size_t i = 0; i < count; ++i) {
typename OS::tgt_iovec tiov;
- p->readBlob(tiov_base + i*sizeof(typename OS::tgt_iovec),
- (uint8_t*)&tiov, sizeof(typename OS::tgt_iovec));
+ p.readBlob(tiov_base + i*sizeof(typename OS::tgt_iovec),
+ (uint8_t*)&tiov, sizeof(typename OS::tgt_iovec));
hiov[i].iov_len = TheISA::gtoh(tiov.iov_len);
hiov[i].iov_base = new char [hiov[i].iov_len];
- p->readBlob(TheISA::gtoh(tiov.iov_base), (uint8_t *)hiov[i].iov_base,
- hiov[i].iov_len);
+ p.readBlob(TheISA::gtoh(tiov.iov_base), (uint8_t *)hiov[i].iov_base,
+ hiov[i].iov_len);
}
int result = writev(process->sim_fd(fd), hiov, count);
std::string path;
int index = 0;
- if (!tc->getMemProxy()->tryReadString(path,
+ if (!tc->getMemProxy().tryReadString(path,
process->getSyscallArg(tc, index))) {
return -EFAULT;
}
if(taddr != 0) {
typename OS::time_t t = sec;
t = TheISA::htog(t);
- SETranslatingPortProxy *p = tc->getMemProxy();
- p->writeBlob(taddr, (uint8_t*)&t, (int)sizeof(typename OS::time_t));
+ SETranslatingPortProxy &p = tc->getMemProxy();
+ p.writeBlob(taddr, (uint8_t*)&t, (int)sizeof(typename OS::time_t));
}
return sec;
}
#include "debug/Loader.hh"
#include "debug/WorkItems.hh"
#include "kern/kernel_stats.hh"
-#include "mem/fs_translating_port_proxy.hh"
-#include "mem/mem_object.hh"
#include "mem/physical.hh"
#include "params/System.hh"
#include "sim/byteswap.hh"
_numContexts(0),
pagePtr(0),
init_param(p->init_param),
+ physProxy(_systemPort),
+ virtProxy(_systemPort),
loadAddrMask(p->load_addr_mask),
nextPID(0),
memoryMode(p->mem_mode),
kernelSymtab = new SymbolTable;
if (!debugSymbolTable)
debugSymbolTable = new SymbolTable;
-
- /**
- * Get a port proxy to memory
- */
- physProxy = new PortProxy(*getSystemPort());
- virtProxy = new FSTranslatingPortProxy(*getSystemPort());
}
// Get the generic system master IDs
#include "cpu/pc_event.hh"
#include "enums/MemoryMode.hh"
#include "kern/system_events.hh"
+#include "mem/fs_translating_port_proxy.hh"
#include "mem/mem_object.hh"
#include "mem/port.hh"
#include "params/System.hh"
class BaseCPU;
class BaseRemoteGDB;
-class FSTranslatingPortProxy;
class GDBListener;
class ObjectFile;
class PhysicalMemory;
class Platform;
-class PortProxy;
class ThreadContext;
-class VirtualPort;
class System : public MemObject
{
virtual void init();
/**
- * Get a pointer to the system port that can be used by
+ * Get a reference to the system port that can be used by
* non-structural simulation objects like processes or threads, or
* external entities like loaders and debuggers, etc, to access
* the memory system.
*
- * @return a pointer to the system port we own
+ * @return a reference to the system port we own
*/
- Port* getSystemPort() { return &_systemPort; }
+ Port& getSystemPort() { return _systemPort; }
/**
* Additional function to return the Port of a memory object.
/** Port to physical memory used for writing object files into ram at
* boot.*/
- PortProxy* physProxy;
- FSTranslatingPortProxy* virtProxy;
+ PortProxy physProxy;
+ FSTranslatingPortProxy virtProxy;
/** kernel symbol table */
SymbolTable *kernelSymtab;
if (!ptr)
return;
- FSTranslatingPortProxy* proxy = tc->getVirtProxy();
- proxy->readBlob(ptr, buffer, sizeof(T));
+ FSTranslatingPortProxy &proxy = tc->getVirtProxy();
+ proxy.readBlob(ptr, buffer, sizeof(T));
}
bool
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