These have been migrated to be run via testlib.
Change-Id: I186e4048096f718c0de378033924cd23328168d7
Jira: https://gem5.atlassian.net/browse/GEM5-109
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25843
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
+++ /dev/null
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu0 cpu1 cpu2 cpu3 cpu_clk_domain dvfs_handler l2c membus physmem toL2Bus voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu0]
-type=DerivO3CPU
-children=branchPred dcache dtb fuPool icache interrupts isa itb tracer workload
-LFSTSize=1024
-LQEntries=32
-LSQCheckLoads=true
-LSQDepCheckShift=4
-SQEntries=32
-SSITSize=1024
-activity=0
-backComSize=5
-branchPred=system.cpu0.branchPred
-cacheStorePorts=200
-checker=Null
-clk_domain=system.cpu_clk_domain
-commitToDecodeDelay=1
-commitToFetchDelay=1
-commitToIEWDelay=1
-commitToRenameDelay=1
-commitWidth=8
-cpu_id=0
-decodeToFetchDelay=1
-decodeToRenameDelay=1
-decodeWidth=8
-default_p_state=UNDEFINED
-dispatchWidth=8
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu0.dtb
-eventq_index=0
-fetchBufferSize=64
-fetchQueueSize=32
-fetchToDecodeDelay=1
-fetchTrapLatency=1
-fetchWidth=8
-forwardComSize=5
-fuPool=system.cpu0.fuPool
-function_trace=false
-function_trace_start=0
-iewToCommitDelay=1
-iewToDecodeDelay=1
-iewToFetchDelay=1
-iewToRenameDelay=1
-interrupts=system.cpu0.interrupts
-isa=system.cpu0.isa
-issueToExecuteDelay=1
-issueWidth=8
-itb=system.cpu0.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-needsTSO=false
-numIQEntries=64
-numPhysCCRegs=0
-numPhysFloatRegs=256
-numPhysIntRegs=256
-numROBEntries=192
-numRobs=1
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-renameToDecodeDelay=1
-renameToFetchDelay=1
-renameToIEWDelay=2
-renameToROBDelay=1
-renameWidth=8
-simpoint_start_insts=
-smtCommitPolicy=RoundRobin
-smtFetchPolicy=SingleThread
-smtIQPolicy=Partitioned
-smtIQThreshold=100
-smtLSQPolicy=Partitioned
-smtLSQThreshold=100
-smtNumFetchingThreads=1
-smtROBPolicy=Partitioned
-smtROBThreshold=100
-socket_id=0
-squashWidth=8
-store_set_clear_period=250000
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu0.tracer
-trapLatency=13
-wbWidth=8
-workload=system.cpu0.workload
-dcache_port=system.cpu0.dcache.cpu_side
-icache_port=system.cpu0.icache.cpu_side
-
-[system.cpu0.branchPred]
-type=TournamentBP
-BTBEntries=4096
-BTBTagSize=16
-RASSize=16
-choiceCtrBits=2
-choicePredictorSize=8192
-eventq_index=0
-globalCtrBits=2
-globalPredictorSize=8192
-indirectHashGHR=true
-indirectHashTargets=true
-indirectPathLength=3
-indirectSets=256
-indirectTagSize=16
-indirectWays=2
-instShiftAmt=2
-localCtrBits=2
-localHistoryTableSize=2048
-localPredictorSize=2048
-numThreads=1
-useIndirect=true
-
-[system.cpu0.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=4
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu0.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu0.dcache_port
-mem_side=system.toL2Bus.slave[1]
-
-[system.cpu0.dcache.tags]
-type=LRU
-assoc=4
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu0.dtb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu0.fuPool]
-type=FUPool
-children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
-FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4 system.cpu0.fuPool.FUList5 system.cpu0.fuPool.FUList6 system.cpu0.fuPool.FUList7 system.cpu0.fuPool.FUList8
-eventq_index=0
-
-[system.cpu0.fuPool.FUList0]
-type=FUDesc
-children=opList
-count=6
-eventq_index=0
-opList=system.cpu0.fuPool.FUList0.opList
-
-[system.cpu0.fuPool.FUList0.opList]
-type=OpDesc
-eventq_index=0
-opClass=IntAlu
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList1]
-type=FUDesc
-children=opList0 opList1
-count=2
-eventq_index=0
-opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1
-
-[system.cpu0.fuPool.FUList1.opList0]
-type=OpDesc
-eventq_index=0
-opClass=IntMult
-opLat=3
-pipelined=true
-
-[system.cpu0.fuPool.FUList1.opList1]
-type=OpDesc
-eventq_index=0
-opClass=IntDiv
-opLat=20
-pipelined=false
-
-[system.cpu0.fuPool.FUList2]
-type=FUDesc
-children=opList0 opList1 opList2
-count=4
-eventq_index=0
-opList=system.cpu0.fuPool.FUList2.opList0 system.cpu0.fuPool.FUList2.opList1 system.cpu0.fuPool.FUList2.opList2
-
-[system.cpu0.fuPool.FUList2.opList0]
-type=OpDesc
-eventq_index=0
-opClass=FloatAdd
-opLat=2
-pipelined=true
-
-[system.cpu0.fuPool.FUList2.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatCmp
-opLat=2
-pipelined=true
-
-[system.cpu0.fuPool.FUList2.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatCvt
-opLat=2
-pipelined=true
-
-[system.cpu0.fuPool.FUList3]
-type=FUDesc
-children=opList0 opList1 opList2 opList3 opList4
-count=2
-eventq_index=0
-opList=system.cpu0.fuPool.FUList3.opList0 system.cpu0.fuPool.FUList3.opList1 system.cpu0.fuPool.FUList3.opList2 system.cpu0.fuPool.FUList3.opList3 system.cpu0.fuPool.FUList3.opList4
-
-[system.cpu0.fuPool.FUList3.opList0]
-type=OpDesc
-eventq_index=0
-opClass=FloatMult
-opLat=4
-pipelined=true
-
-[system.cpu0.fuPool.FUList3.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMultAcc
-opLat=5
-pipelined=true
-
-[system.cpu0.fuPool.FUList3.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatMisc
-opLat=3
-pipelined=true
-
-[system.cpu0.fuPool.FUList3.opList3]
-type=OpDesc
-eventq_index=0
-opClass=FloatDiv
-opLat=12
-pipelined=false
-
-[system.cpu0.fuPool.FUList3.opList4]
-type=OpDesc
-eventq_index=0
-opClass=FloatSqrt
-opLat=24
-pipelined=false
-
-[system.cpu0.fuPool.FUList4]
-type=FUDesc
-children=opList0 opList1
-count=0
-eventq_index=0
-opList=system.cpu0.fuPool.FUList4.opList0 system.cpu0.fuPool.FUList4.opList1
-
-[system.cpu0.fuPool.FUList4.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemRead
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList4.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemRead
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5]
-type=FUDesc
-children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
-count=4
-eventq_index=0
-opList=system.cpu0.fuPool.FUList5.opList00 system.cpu0.fuPool.FUList5.opList01 system.cpu0.fuPool.FUList5.opList02 system.cpu0.fuPool.FUList5.opList03 system.cpu0.fuPool.FUList5.opList04 system.cpu0.fuPool.FUList5.opList05 system.cpu0.fuPool.FUList5.opList06 system.cpu0.fuPool.FUList5.opList07 system.cpu0.fuPool.FUList5.opList08 system.cpu0.fuPool.FUList5.opList09 system.cpu0.fuPool.FUList5.opList10 system.cpu0.fuPool.FUList5.opList11 system.cpu0.fuPool.FUList5.opList12 system.cpu0.fuPool.FUList5.opList13 system.cpu0.fuPool.FUList5.opList14 system.cpu0.fuPool.FUList5.opList15 system.cpu0.fuPool.FUList5.opList16 system.cpu0.fuPool.FUList5.opList17 system.cpu0.fuPool.FUList5.opList18 system.cpu0.fuPool.FUList5.opList19
-
-[system.cpu0.fuPool.FUList5.opList00]
-type=OpDesc
-eventq_index=0
-opClass=SimdAdd
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5.opList01]
-type=OpDesc
-eventq_index=0
-opClass=SimdAddAcc
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5.opList02]
-type=OpDesc
-eventq_index=0
-opClass=SimdAlu
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5.opList03]
-type=OpDesc
-eventq_index=0
-opClass=SimdCmp
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5.opList04]
-type=OpDesc
-eventq_index=0
-opClass=SimdCvt
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5.opList05]
-type=OpDesc
-eventq_index=0
-opClass=SimdMisc
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5.opList06]
-type=OpDesc
-eventq_index=0
-opClass=SimdMult
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5.opList07]
-type=OpDesc
-eventq_index=0
-opClass=SimdMultAcc
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5.opList08]
-type=OpDesc
-eventq_index=0
-opClass=SimdShift
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5.opList09]
-type=OpDesc
-eventq_index=0
-opClass=SimdShiftAcc
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5.opList10]
-type=OpDesc
-eventq_index=0
-opClass=SimdSqrt
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5.opList11]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatAdd
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5.opList12]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatAlu
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5.opList13]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatCmp
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5.opList14]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatCvt
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5.opList15]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatDiv
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5.opList16]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMisc
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5.opList17]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMult
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5.opList18]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMultAcc
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList5.opList19]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatSqrt
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList6]
-type=FUDesc
-children=opList0 opList1
-count=0
-eventq_index=0
-opList=system.cpu0.fuPool.FUList6.opList0 system.cpu0.fuPool.FUList6.opList1
-
-[system.cpu0.fuPool.FUList6.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemWrite
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList6.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemWrite
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList7]
-type=FUDesc
-children=opList0 opList1 opList2 opList3
-count=4
-eventq_index=0
-opList=system.cpu0.fuPool.FUList7.opList0 system.cpu0.fuPool.FUList7.opList1 system.cpu0.fuPool.FUList7.opList2 system.cpu0.fuPool.FUList7.opList3
-
-[system.cpu0.fuPool.FUList7.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemRead
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList7.opList1]
-type=OpDesc
-eventq_index=0
-opClass=MemWrite
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList7.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemRead
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList7.opList3]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemWrite
-opLat=1
-pipelined=true
-
-[system.cpu0.fuPool.FUList8]
-type=FUDesc
-children=opList
-count=1
-eventq_index=0
-opList=system.cpu0.fuPool.FUList8.opList
-
-[system.cpu0.fuPool.FUList8.opList]
-type=OpDesc
-eventq_index=0
-opClass=IprAccess
-opLat=3
-pipelined=false
-
-[system.cpu0.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=1
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu0.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu0.icache_port
-mem_side=system.toL2Bus.slave[0]
-
-[system.cpu0.icache.tags]
-type=LRU
-assoc=1
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu0.interrupts]
-type=SparcInterrupts
-eventq_index=0
-
-[system.cpu0.isa]
-type=SparcISA
-eventq_index=0
-
-[system.cpu0.itb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu0.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu0.workload]
-type=Process
-cmd=test_atomic 4
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/m5threads/bin/sparc/linux/test_atomic
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu1]
-type=DerivO3CPU
-children=branchPred dcache dtb fuPool icache interrupts isa itb tracer
-LFSTSize=1024
-LQEntries=32
-LSQCheckLoads=true
-LSQDepCheckShift=4
-SQEntries=32
-SSITSize=1024
-activity=0
-backComSize=5
-branchPred=system.cpu1.branchPred
-cacheStorePorts=200
-checker=Null
-clk_domain=system.cpu_clk_domain
-commitToDecodeDelay=1
-commitToFetchDelay=1
-commitToIEWDelay=1
-commitToRenameDelay=1
-commitWidth=8
-cpu_id=1
-decodeToFetchDelay=1
-decodeToRenameDelay=1
-decodeWidth=8
-default_p_state=UNDEFINED
-dispatchWidth=8
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu1.dtb
-eventq_index=0
-fetchBufferSize=64
-fetchQueueSize=32
-fetchToDecodeDelay=1
-fetchTrapLatency=1
-fetchWidth=8
-forwardComSize=5
-fuPool=system.cpu1.fuPool
-function_trace=false
-function_trace_start=0
-iewToCommitDelay=1
-iewToDecodeDelay=1
-iewToFetchDelay=1
-iewToRenameDelay=1
-interrupts=system.cpu1.interrupts
-isa=system.cpu1.isa
-issueToExecuteDelay=1
-issueWidth=8
-itb=system.cpu1.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-needsTSO=false
-numIQEntries=64
-numPhysCCRegs=0
-numPhysFloatRegs=256
-numPhysIntRegs=256
-numROBEntries=192
-numRobs=1
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-renameToDecodeDelay=1
-renameToFetchDelay=1
-renameToIEWDelay=2
-renameToROBDelay=1
-renameWidth=8
-simpoint_start_insts=
-smtCommitPolicy=RoundRobin
-smtFetchPolicy=SingleThread
-smtIQPolicy=Partitioned
-smtIQThreshold=100
-smtLSQPolicy=Partitioned
-smtLSQThreshold=100
-smtNumFetchingThreads=1
-smtROBPolicy=Partitioned
-smtROBThreshold=100
-socket_id=0
-squashWidth=8
-store_set_clear_period=250000
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu1.tracer
-trapLatency=13
-wbWidth=8
-workload=system.cpu0.workload
-dcache_port=system.cpu1.dcache.cpu_side
-icache_port=system.cpu1.icache.cpu_side
-
-[system.cpu1.branchPred]
-type=TournamentBP
-BTBEntries=4096
-BTBTagSize=16
-RASSize=16
-choiceCtrBits=2
-choicePredictorSize=8192
-eventq_index=0
-globalCtrBits=2
-globalPredictorSize=8192
-indirectHashGHR=true
-indirectHashTargets=true
-indirectPathLength=3
-indirectSets=256
-indirectTagSize=16
-indirectWays=2
-instShiftAmt=2
-localCtrBits=2
-localHistoryTableSize=2048
-localPredictorSize=2048
-numThreads=1
-useIndirect=true
-
-[system.cpu1.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=4
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu1.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu1.dcache_port
-mem_side=system.toL2Bus.slave[3]
-
-[system.cpu1.dcache.tags]
-type=LRU
-assoc=4
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu1.dtb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu1.fuPool]
-type=FUPool
-children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
-FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4 system.cpu1.fuPool.FUList5 system.cpu1.fuPool.FUList6 system.cpu1.fuPool.FUList7 system.cpu1.fuPool.FUList8
-eventq_index=0
-
-[system.cpu1.fuPool.FUList0]
-type=FUDesc
-children=opList
-count=6
-eventq_index=0
-opList=system.cpu1.fuPool.FUList0.opList
-
-[system.cpu1.fuPool.FUList0.opList]
-type=OpDesc
-eventq_index=0
-opClass=IntAlu
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList1]
-type=FUDesc
-children=opList0 opList1
-count=2
-eventq_index=0
-opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1
-
-[system.cpu1.fuPool.FUList1.opList0]
-type=OpDesc
-eventq_index=0
-opClass=IntMult
-opLat=3
-pipelined=true
-
-[system.cpu1.fuPool.FUList1.opList1]
-type=OpDesc
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-opClass=IntDiv
-opLat=20
-pipelined=false
-
-[system.cpu1.fuPool.FUList2]
-type=FUDesc
-children=opList0 opList1 opList2
-count=4
-eventq_index=0
-opList=system.cpu1.fuPool.FUList2.opList0 system.cpu1.fuPool.FUList2.opList1 system.cpu1.fuPool.FUList2.opList2
-
-[system.cpu1.fuPool.FUList2.opList0]
-type=OpDesc
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-opClass=FloatAdd
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-pipelined=true
-
-[system.cpu1.fuPool.FUList2.opList1]
-type=OpDesc
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-opClass=FloatCmp
-opLat=2
-pipelined=true
-
-[system.cpu1.fuPool.FUList2.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatCvt
-opLat=2
-pipelined=true
-
-[system.cpu1.fuPool.FUList3]
-type=FUDesc
-children=opList0 opList1 opList2 opList3 opList4
-count=2
-eventq_index=0
-opList=system.cpu1.fuPool.FUList3.opList0 system.cpu1.fuPool.FUList3.opList1 system.cpu1.fuPool.FUList3.opList2 system.cpu1.fuPool.FUList3.opList3 system.cpu1.fuPool.FUList3.opList4
-
-[system.cpu1.fuPool.FUList3.opList0]
-type=OpDesc
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-opClass=FloatMult
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-
-[system.cpu1.fuPool.FUList3.opList1]
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-pipelined=true
-
-[system.cpu1.fuPool.FUList3.opList2]
-type=OpDesc
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-opClass=FloatMisc
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-pipelined=true
-
-[system.cpu1.fuPool.FUList3.opList3]
-type=OpDesc
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-opClass=FloatDiv
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-pipelined=false
-
-[system.cpu1.fuPool.FUList3.opList4]
-type=OpDesc
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-opClass=FloatSqrt
-opLat=24
-pipelined=false
-
-[system.cpu1.fuPool.FUList4]
-type=FUDesc
-children=opList0 opList1
-count=0
-eventq_index=0
-opList=system.cpu1.fuPool.FUList4.opList0 system.cpu1.fuPool.FUList4.opList1
-
-[system.cpu1.fuPool.FUList4.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemRead
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList4.opList1]
-type=OpDesc
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-opClass=FloatMemRead
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5]
-type=FUDesc
-children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
-count=4
-eventq_index=0
-opList=system.cpu1.fuPool.FUList5.opList00 system.cpu1.fuPool.FUList5.opList01 system.cpu1.fuPool.FUList5.opList02 system.cpu1.fuPool.FUList5.opList03 system.cpu1.fuPool.FUList5.opList04 system.cpu1.fuPool.FUList5.opList05 system.cpu1.fuPool.FUList5.opList06 system.cpu1.fuPool.FUList5.opList07 system.cpu1.fuPool.FUList5.opList08 system.cpu1.fuPool.FUList5.opList09 system.cpu1.fuPool.FUList5.opList10 system.cpu1.fuPool.FUList5.opList11 system.cpu1.fuPool.FUList5.opList12 system.cpu1.fuPool.FUList5.opList13 system.cpu1.fuPool.FUList5.opList14 system.cpu1.fuPool.FUList5.opList15 system.cpu1.fuPool.FUList5.opList16 system.cpu1.fuPool.FUList5.opList17 system.cpu1.fuPool.FUList5.opList18 system.cpu1.fuPool.FUList5.opList19
-
-[system.cpu1.fuPool.FUList5.opList00]
-type=OpDesc
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-opClass=SimdAdd
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5.opList01]
-type=OpDesc
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-opClass=SimdAddAcc
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5.opList02]
-type=OpDesc
-eventq_index=0
-opClass=SimdAlu
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5.opList03]
-type=OpDesc
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-opClass=SimdCmp
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5.opList04]
-type=OpDesc
-eventq_index=0
-opClass=SimdCvt
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5.opList05]
-type=OpDesc
-eventq_index=0
-opClass=SimdMisc
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5.opList06]
-type=OpDesc
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-opClass=SimdMult
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5.opList07]
-type=OpDesc
-eventq_index=0
-opClass=SimdMultAcc
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5.opList08]
-type=OpDesc
-eventq_index=0
-opClass=SimdShift
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5.opList09]
-type=OpDesc
-eventq_index=0
-opClass=SimdShiftAcc
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5.opList10]
-type=OpDesc
-eventq_index=0
-opClass=SimdSqrt
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5.opList11]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatAdd
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5.opList12]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatAlu
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5.opList13]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatCmp
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5.opList14]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatCvt
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5.opList15]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatDiv
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5.opList16]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMisc
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5.opList17]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMult
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5.opList18]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMultAcc
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList5.opList19]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatSqrt
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList6]
-type=FUDesc
-children=opList0 opList1
-count=0
-eventq_index=0
-opList=system.cpu1.fuPool.FUList6.opList0 system.cpu1.fuPool.FUList6.opList1
-
-[system.cpu1.fuPool.FUList6.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemWrite
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList6.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemWrite
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList7]
-type=FUDesc
-children=opList0 opList1 opList2 opList3
-count=4
-eventq_index=0
-opList=system.cpu1.fuPool.FUList7.opList0 system.cpu1.fuPool.FUList7.opList1 system.cpu1.fuPool.FUList7.opList2 system.cpu1.fuPool.FUList7.opList3
-
-[system.cpu1.fuPool.FUList7.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemRead
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList7.opList1]
-type=OpDesc
-eventq_index=0
-opClass=MemWrite
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList7.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemRead
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList7.opList3]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemWrite
-opLat=1
-pipelined=true
-
-[system.cpu1.fuPool.FUList8]
-type=FUDesc
-children=opList
-count=1
-eventq_index=0
-opList=system.cpu1.fuPool.FUList8.opList
-
-[system.cpu1.fuPool.FUList8.opList]
-type=OpDesc
-eventq_index=0
-opClass=IprAccess
-opLat=3
-pipelined=false
-
-[system.cpu1.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=1
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu1.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu1.icache_port
-mem_side=system.toL2Bus.slave[2]
-
-[system.cpu1.icache.tags]
-type=LRU
-assoc=1
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu1.interrupts]
-type=SparcInterrupts
-eventq_index=0
-
-[system.cpu1.isa]
-type=SparcISA
-eventq_index=0
-
-[system.cpu1.itb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu1.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu2]
-type=DerivO3CPU
-children=branchPred dcache dtb fuPool icache interrupts isa itb tracer
-LFSTSize=1024
-LQEntries=32
-LSQCheckLoads=true
-LSQDepCheckShift=4
-SQEntries=32
-SSITSize=1024
-activity=0
-backComSize=5
-branchPred=system.cpu2.branchPred
-cacheStorePorts=200
-checker=Null
-clk_domain=system.cpu_clk_domain
-commitToDecodeDelay=1
-commitToFetchDelay=1
-commitToIEWDelay=1
-commitToRenameDelay=1
-commitWidth=8
-cpu_id=2
-decodeToFetchDelay=1
-decodeToRenameDelay=1
-decodeWidth=8
-default_p_state=UNDEFINED
-dispatchWidth=8
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu2.dtb
-eventq_index=0
-fetchBufferSize=64
-fetchQueueSize=32
-fetchToDecodeDelay=1
-fetchTrapLatency=1
-fetchWidth=8
-forwardComSize=5
-fuPool=system.cpu2.fuPool
-function_trace=false
-function_trace_start=0
-iewToCommitDelay=1
-iewToDecodeDelay=1
-iewToFetchDelay=1
-iewToRenameDelay=1
-interrupts=system.cpu2.interrupts
-isa=system.cpu2.isa
-issueToExecuteDelay=1
-issueWidth=8
-itb=system.cpu2.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-needsTSO=false
-numIQEntries=64
-numPhysCCRegs=0
-numPhysFloatRegs=256
-numPhysIntRegs=256
-numROBEntries=192
-numRobs=1
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-renameToDecodeDelay=1
-renameToFetchDelay=1
-renameToIEWDelay=2
-renameToROBDelay=1
-renameWidth=8
-simpoint_start_insts=
-smtCommitPolicy=RoundRobin
-smtFetchPolicy=SingleThread
-smtIQPolicy=Partitioned
-smtIQThreshold=100
-smtLSQPolicy=Partitioned
-smtLSQThreshold=100
-smtNumFetchingThreads=1
-smtROBPolicy=Partitioned
-smtROBThreshold=100
-socket_id=0
-squashWidth=8
-store_set_clear_period=250000
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu2.tracer
-trapLatency=13
-wbWidth=8
-workload=system.cpu0.workload
-dcache_port=system.cpu2.dcache.cpu_side
-icache_port=system.cpu2.icache.cpu_side
-
-[system.cpu2.branchPred]
-type=TournamentBP
-BTBEntries=4096
-BTBTagSize=16
-RASSize=16
-choiceCtrBits=2
-choicePredictorSize=8192
-eventq_index=0
-globalCtrBits=2
-globalPredictorSize=8192
-indirectHashGHR=true
-indirectHashTargets=true
-indirectPathLength=3
-indirectSets=256
-indirectTagSize=16
-indirectWays=2
-instShiftAmt=2
-localCtrBits=2
-localHistoryTableSize=2048
-localPredictorSize=2048
-numThreads=1
-useIndirect=true
-
-[system.cpu2.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=4
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu2.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu2.dcache_port
-mem_side=system.toL2Bus.slave[5]
-
-[system.cpu2.dcache.tags]
-type=LRU
-assoc=4
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu2.dtb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu2.fuPool]
-type=FUPool
-children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
-FUList=system.cpu2.fuPool.FUList0 system.cpu2.fuPool.FUList1 system.cpu2.fuPool.FUList2 system.cpu2.fuPool.FUList3 system.cpu2.fuPool.FUList4 system.cpu2.fuPool.FUList5 system.cpu2.fuPool.FUList6 system.cpu2.fuPool.FUList7 system.cpu2.fuPool.FUList8
-eventq_index=0
-
-[system.cpu2.fuPool.FUList0]
-type=FUDesc
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-count=6
-eventq_index=0
-opList=system.cpu2.fuPool.FUList0.opList
-
-[system.cpu2.fuPool.FUList0.opList]
-type=OpDesc
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-opClass=IntAlu
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-pipelined=true
-
-[system.cpu2.fuPool.FUList1]
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-opList=system.cpu2.fuPool.FUList1.opList0 system.cpu2.fuPool.FUList1.opList1
-
-[system.cpu2.fuPool.FUList1.opList0]
-type=OpDesc
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-opClass=IntMult
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-
-[system.cpu2.fuPool.FUList1.opList1]
-type=OpDesc
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-opClass=IntDiv
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-
-[system.cpu2.fuPool.FUList2]
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-eventq_index=0
-opList=system.cpu2.fuPool.FUList2.opList0 system.cpu2.fuPool.FUList2.opList1 system.cpu2.fuPool.FUList2.opList2
-
-[system.cpu2.fuPool.FUList2.opList0]
-type=OpDesc
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-opClass=FloatAdd
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-
-[system.cpu2.fuPool.FUList2.opList1]
-type=OpDesc
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-opClass=FloatCmp
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-pipelined=true
-
-[system.cpu2.fuPool.FUList2.opList2]
-type=OpDesc
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-opClass=FloatCvt
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-pipelined=true
-
-[system.cpu2.fuPool.FUList3]
-type=FUDesc
-children=opList0 opList1 opList2 opList3 opList4
-count=2
-eventq_index=0
-opList=system.cpu2.fuPool.FUList3.opList0 system.cpu2.fuPool.FUList3.opList1 system.cpu2.fuPool.FUList3.opList2 system.cpu2.fuPool.FUList3.opList3 system.cpu2.fuPool.FUList3.opList4
-
-[system.cpu2.fuPool.FUList3.opList0]
-type=OpDesc
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-opClass=FloatMult
-opLat=4
-pipelined=true
-
-[system.cpu2.fuPool.FUList3.opList1]
-type=OpDesc
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-opClass=FloatMultAcc
-opLat=5
-pipelined=true
-
-[system.cpu2.fuPool.FUList3.opList2]
-type=OpDesc
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-opClass=FloatMisc
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-pipelined=true
-
-[system.cpu2.fuPool.FUList3.opList3]
-type=OpDesc
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-opClass=FloatDiv
-opLat=12
-pipelined=false
-
-[system.cpu2.fuPool.FUList3.opList4]
-type=OpDesc
-eventq_index=0
-opClass=FloatSqrt
-opLat=24
-pipelined=false
-
-[system.cpu2.fuPool.FUList4]
-type=FUDesc
-children=opList0 opList1
-count=0
-eventq_index=0
-opList=system.cpu2.fuPool.FUList4.opList0 system.cpu2.fuPool.FUList4.opList1
-
-[system.cpu2.fuPool.FUList4.opList0]
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-
-[system.cpu2.icache.tags]
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-
-[system.cpu2.interrupts]
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-
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-
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-
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-
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-
-[system.cpu3.branchPred]
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-[system.cpu3.dcache]
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-
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-
-[system.cpu3.fuPool.FUList7]
-type=FUDesc
-children=opList0 opList1 opList2 opList3
-count=4
-eventq_index=0
-opList=system.cpu3.fuPool.FUList7.opList0 system.cpu3.fuPool.FUList7.opList1 system.cpu3.fuPool.FUList7.opList2 system.cpu3.fuPool.FUList7.opList3
-
-[system.cpu3.fuPool.FUList7.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemRead
-opLat=1
-pipelined=true
-
-[system.cpu3.fuPool.FUList7.opList1]
-type=OpDesc
-eventq_index=0
-opClass=MemWrite
-opLat=1
-pipelined=true
-
-[system.cpu3.fuPool.FUList7.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemRead
-opLat=1
-pipelined=true
-
-[system.cpu3.fuPool.FUList7.opList3]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemWrite
-opLat=1
-pipelined=true
-
-[system.cpu3.fuPool.FUList8]
-type=FUDesc
-children=opList
-count=1
-eventq_index=0
-opList=system.cpu3.fuPool.FUList8.opList
-
-[system.cpu3.fuPool.FUList8.opList]
-type=OpDesc
-eventq_index=0
-opClass=IprAccess
-opLat=3
-pipelined=false
-
-[system.cpu3.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=1
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu3.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu3.icache_port
-mem_side=system.toL2Bus.slave[6]
-
-[system.cpu3.icache.tags]
-type=LRU
-assoc=1
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu3.interrupts]
-type=SparcInterrupts
-eventq_index=0
-
-[system.cpu3.isa]
-type=SparcISA
-eventq_index=0
-
-[system.cpu3.itb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu3.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.l2c]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=4194304
-system=system
-tag_latency=20
-tags=system.l2c.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.l2c.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=4194304
-tag_latency=20
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.l2c.mem_side
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=DRAMCtrl
-IDD0=0.055000
-IDD02=0.000000
-IDD2N=0.032000
-IDD2N2=0.000000
-IDD2P0=0.000000
-IDD2P02=0.000000
-IDD2P1=0.032000
-IDD2P12=0.000000
-IDD3N=0.038000
-IDD3N2=0.000000
-IDD3P0=0.000000
-IDD3P02=0.000000
-IDD3P1=0.038000
-IDD3P12=0.000000
-IDD4R=0.157000
-IDD4R2=0.000000
-IDD4W=0.125000
-IDD4W2=0.000000
-IDD5=0.235000
-IDD52=0.000000
-IDD6=0.020000
-IDD62=0.000000
-VDD=1.500000
-VDD2=0.000000
-activation_limit=4
-addr_mapping=RoRaBaCoCh
-bank_groups_per_rank=0
-banks_per_rank=8
-burst_length=8
-channels=1
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-device_bus_width=8
-device_rowbuffer_size=1024
-device_size=536870912
-devices_per_rank=8
-dll=true
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-max_accesses_per_row=16
-mem_sched_policy=frfcfs
-min_writes_per_switch=16
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-page_policy=open_adaptive
-power_model=Null
-range=0:134217727:0:0:0:0
-ranks_per_channel=2
-read_buffer_size=32
-static_backend_latency=10000
-static_frontend_latency=10000
-tBURST=5000
-tCCD_L=0
-tCK=1250
-tCL=13750
-tCS=2500
-tRAS=35000
-tRCD=13750
-tREFI=7800000
-tRFC=260000
-tRP=13750
-tRRD=6000
-tRRD_L=0
-tRTP=7500
-tRTW=2500
-tWR=15000
-tWTR=7500
-tXAW=30000
-tXP=6000
-tXPDLL=0
-tXS=270000
-tXSDLL=0
-write_buffer_size=64
-write_high_thresh_perc=85
-write_low_thresh_perc=50
-port=system.membus.master[0]
-
-[system.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.l2c.cpu_side
-slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
-
-[system.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
+++ /dev/null
-warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0. Starting simulation...
-warn: ClockedObject: Already in the requested power state, request ignored
+++ /dev/null
-Redirecting stdout to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp/simout
-Redirecting stderr to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp/simerr
-gem5 Simulator System. http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Mar 29 2017 21:12:17
-gem5 started Mar 29 2017 21:12:27
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 42630
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp
-
-Global frequency set at 1000000000000 ticks per second
-Init done
-[Iteration 1, Thread 1] Got lock
-[Iteration 1, Thread 1] Critical section done, previously next=0, now next=1
-[Iteration 1, Thread 3] Got lock
-[Iteration 1, Thread 3] Critical section done, previously next=1, now next=3
-[Iteration 1, Thread 2] Got lock
-[Iteration 1, Thread 2] Critical section done, previously next=3, now next=2
-Iteration 1 completed
-[Iteration 2, Thread 3] Got lock
-[Iteration 2, Thread 3] Critical section done, previously next=0, now next=3
-[Iteration 2, Thread 2] Got lock
-[Iteration 2, Thread 2] Critical section done, previously next=3, now next=2
-[Iteration 2, Thread 1] Got lock
-[Iteration 2, Thread 1] Critical section done, previously next=2, now next=1
-Iteration 2 completed
-[Iteration 3, Thread 2] Got lock
-[Iteration 3, Thread 2] Critical section done, previously next=0, now next=2
-[Iteration 3, Thread 3] Got lock
-[Iteration 3, Thread 3] Critical section done, previously next=2, now next=3
-[Iteration 3, Thread 1] Got lock
-[Iteration 3, Thread 1] Critical section done, previously next=3, now next=1
-Iteration 3 completed
-[Iteration 4, Thread 1] Got lock
-[Iteration 4, Thread 1] Critical section done, previously next=0, now next=1
-[Iteration 4, Thread 3] Got lock
-[Iteration 4, Thread 3] Critical section done, previously next=1, now next=3
-[Iteration 4, Thread 2] Got lock
-[Iteration 4, Thread 2] Critical section done, previously next=3, now next=2
-Iteration 4 completed
-[Iteration 5, Thread 1] Got lock
-[Iteration 5, Thread 1] Critical section done, previously next=0, now next=1
-[Iteration 5, Thread 2] Got lock
-[Iteration 5, Thread 2] Critical section done, previously next=1, now next=2
-[Iteration 5, Thread 3] Got lock
-[Iteration 5, Thread 3] Critical section done, previously next=2, now next=3
-Iteration 5 completed
-[Iteration 6, Thread 3] Got lock
-[Iteration 6, Thread 3] Critical section done, previously next=0, now next=3
-[Iteration 6, Thread 2] Got lock
-[Iteration 6, Thread 2] Critical section done, previously next=3, now next=2
-[Iteration 6, Thread 1] Got lock
-[Iteration 6, Thread 1] Critical section done, previously next=2, now next=1
-Iteration 6 completed
-[Iteration 7, Thread 3] Got lock
-[Iteration 7, Thread 3] Critical section done, previously next=0, now next=3
-[Iteration 7, Thread 2] Got lock
-[Iteration 7, Thread 2] Critical section done, previously next=3, now next=2
-[Iteration 7, Thread 1] Got lock
-[Iteration 7, Thread 1] Critical section done, previously next=2, now next=1
-Iteration 7 completed
-[Iteration 8, Thread 3] Got lock
-[Iteration 8, Thread 3] Critical section done, previously next=0, now next=3
-[Iteration 8, Thread 2] Got lock
-[Iteration 8, Thread 2] Critical section done, previously next=3, now next=2
-[Iteration 8, Thread 1] Got lock
-[Iteration 8, Thread 1] Critical section done, previously next=2, now next=1
-Iteration 8 completed
-[Iteration 9, Thread 1] Got lock
-[Iteration 9, Thread 1] Critical section done, previously next=0, now next=1
-[Iteration 9, Thread 2] Got lock
-[Iteration 9, Thread 2] Critical section done, previously next=1, now next=2
-[Iteration 9, Thread 3] Got lock
-[Iteration 9, Thread 3] Critical section done, previously next=2, now next=3
-Iteration 9 completed
-[Iteration 10, Thread 3] Got lock
-[Iteration 10, Thread 3] Critical section done, previously next=0, now next=3
-[Iteration 10, Thread 2] Got lock
-[Iteration 10, Thread 2] Critical section done, previously next=3, now next=2
-[Iteration 10, Thread 1] Got lock
-[Iteration 10, Thread 1] Critical section done, previously next=2, now next=1
-Iteration 10 completed
-PASSED :-)
-Exiting @ tick 126524000 because exiting with last active thread context
+++ /dev/null
-
----------- Begin Simulation Statistics ----------
-sim_seconds 0.000127
-sim_ticks 126524000
-final_tick 126524000
-sim_freq 1000000000000
-host_inst_rate 211101
-host_op_rate 211100
-host_tick_rate 22855727
-host_mem_usage 280860
-host_seconds 5.54
-sim_insts 1168600
-sim_ops 1168600
-system.voltage_domain.voltage 1
-system.clk_domain.clock 1000
-system.physmem.pwrStateResidencyTicks::UNDEFINED 126524000
-system.physmem.bytes_read::cpu0.inst 23616
-system.physmem.bytes_read::cpu0.data 10816
-system.physmem.bytes_read::cpu1.inst 5888
-system.physmem.bytes_read::cpu1.data 1344
-system.physmem.bytes_read::cpu2.inst 896
-system.physmem.bytes_read::cpu2.data 896
-system.physmem.bytes_read::cpu3.inst 768
-system.physmem.bytes_read::cpu3.data 960
-system.physmem.bytes_read::total 45184
-system.physmem.bytes_inst_read::cpu0.inst 23616
-system.physmem.bytes_inst_read::cpu1.inst 5888
-system.physmem.bytes_inst_read::cpu2.inst 896
-system.physmem.bytes_inst_read::cpu3.inst 768
-system.physmem.bytes_inst_read::total 31168
-system.physmem.num_reads::cpu0.inst 369
-system.physmem.num_reads::cpu0.data 169
-system.physmem.num_reads::cpu1.inst 92
-system.physmem.num_reads::cpu1.data 21
-system.physmem.num_reads::cpu2.inst 14
-system.physmem.num_reads::cpu2.data 14
-system.physmem.num_reads::cpu3.inst 12
-system.physmem.num_reads::cpu3.data 15
-system.physmem.num_reads::total 706
-system.physmem.bw_read::cpu0.inst 186652335
-system.physmem.bw_read::cpu0.data 85485758
-system.physmem.bw_read::cpu1.inst 46536625
-system.physmem.bw_read::cpu1.data 10622491
-system.physmem.bw_read::cpu2.inst 7081660
-system.physmem.bw_read::cpu2.data 7081660
-system.physmem.bw_read::cpu3.inst 6069995
-system.physmem.bw_read::cpu3.data 7587493
-system.physmem.bw_read::total 357118017
-system.physmem.bw_inst_read::cpu0.inst 186652335
-system.physmem.bw_inst_read::cpu1.inst 46536625
-system.physmem.bw_inst_read::cpu2.inst 7081660
-system.physmem.bw_inst_read::cpu3.inst 6069995
-system.physmem.bw_inst_read::total 246340615
-system.physmem.bw_total::cpu0.inst 186652335
-system.physmem.bw_total::cpu0.data 85485758
-system.physmem.bw_total::cpu1.inst 46536625
-system.physmem.bw_total::cpu1.data 10622491
-system.physmem.bw_total::cpu2.inst 7081660
-system.physmem.bw_total::cpu2.data 7081660
-system.physmem.bw_total::cpu3.inst 6069995
-system.physmem.bw_total::cpu3.data 7587493
-system.physmem.bw_total::total 357118017
-system.physmem.readReqs 706
-system.physmem.writeReqs 0
-system.physmem.readBursts 706
-system.physmem.writeBursts 0
-system.physmem.bytesReadDRAM 45184
-system.physmem.bytesReadWrQ 0
-system.physmem.bytesWritten 0
-system.physmem.bytesReadSys 45184
-system.physmem.bytesWrittenSys 0
-system.physmem.servicedByWrQ 0
-system.physmem.mergedWrBursts 0
-system.physmem.neitherReadNorWriteReqs 0
-system.physmem.perBankRdBursts::0 118
-system.physmem.perBankRdBursts::1 44
-system.physmem.perBankRdBursts::2 34
-system.physmem.perBankRdBursts::3 38
-system.physmem.perBankRdBursts::4 62
-system.physmem.perBankRdBursts::5 39
-system.physmem.perBankRdBursts::6 22
-system.physmem.perBankRdBursts::7 39
-system.physmem.perBankRdBursts::8 11
-system.physmem.perBankRdBursts::9 29
-system.physmem.perBankRdBursts::10 23
-system.physmem.perBankRdBursts::11 13
-system.physmem.perBankRdBursts::12 69
-system.physmem.perBankRdBursts::13 46
-system.physmem.perBankRdBursts::14 19
-system.physmem.perBankRdBursts::15 100
-system.physmem.perBankWrBursts::0 0
-system.physmem.perBankWrBursts::1 0
-system.physmem.perBankWrBursts::2 0
-system.physmem.perBankWrBursts::3 0
-system.physmem.perBankWrBursts::4 0
-system.physmem.perBankWrBursts::5 0
-system.physmem.perBankWrBursts::6 0
-system.physmem.perBankWrBursts::7 0
-system.physmem.perBankWrBursts::8 0
-system.physmem.perBankWrBursts::9 0
-system.physmem.perBankWrBursts::10 0
-system.physmem.perBankWrBursts::11 0
-system.physmem.perBankWrBursts::12 0
-system.physmem.perBankWrBursts::13 0
-system.physmem.perBankWrBursts::14 0
-system.physmem.perBankWrBursts::15 0
-system.physmem.numRdRetry 0
-system.physmem.numWrRetry 0
-system.physmem.totGap 126284000
-system.physmem.readPktSize::0 0
-system.physmem.readPktSize::1 0
-system.physmem.readPktSize::2 0
-system.physmem.readPktSize::3 0
-system.physmem.readPktSize::4 0
-system.physmem.readPktSize::5 0
-system.physmem.readPktSize::6 706
-system.physmem.writePktSize::0 0
-system.physmem.writePktSize::1 0
-system.physmem.writePktSize::2 0
-system.physmem.writePktSize::3 0
-system.physmem.writePktSize::4 0
-system.physmem.writePktSize::5 0
-system.physmem.writePktSize::6 0
-system.physmem.rdQLenPdf::0 414
-system.physmem.rdQLenPdf::1 215
-system.physmem.rdQLenPdf::2 55
-system.physmem.rdQLenPdf::3 17
-system.physmem.rdQLenPdf::4 4
-system.physmem.rdQLenPdf::5 1
-system.physmem.rdQLenPdf::6 0
-system.physmem.rdQLenPdf::7 0
-system.physmem.rdQLenPdf::8 0
-system.physmem.rdQLenPdf::9 0
-system.physmem.rdQLenPdf::10 0
-system.physmem.rdQLenPdf::11 0
-system.physmem.rdQLenPdf::12 0
-system.physmem.rdQLenPdf::13 0
-system.physmem.rdQLenPdf::14 0
-system.physmem.rdQLenPdf::15 0
-system.physmem.rdQLenPdf::16 0
-system.physmem.rdQLenPdf::17 0
-system.physmem.rdQLenPdf::18 0
-system.physmem.rdQLenPdf::19 0
-system.physmem.rdQLenPdf::20 0
-system.physmem.rdQLenPdf::21 0
-system.physmem.rdQLenPdf::22 0
-system.physmem.rdQLenPdf::23 0
-system.physmem.rdQLenPdf::24 0
-system.physmem.rdQLenPdf::25 0
-system.physmem.rdQLenPdf::26 0
-system.physmem.rdQLenPdf::27 0
-system.physmem.rdQLenPdf::28 0
-system.physmem.rdQLenPdf::29 0
-system.physmem.rdQLenPdf::30 0
-system.physmem.rdQLenPdf::31 0
-system.physmem.wrQLenPdf::0 0
-system.physmem.wrQLenPdf::1 0
-system.physmem.wrQLenPdf::2 0
-system.physmem.wrQLenPdf::3 0
-system.physmem.wrQLenPdf::4 0
-system.physmem.wrQLenPdf::5 0
-system.physmem.wrQLenPdf::6 0
-system.physmem.wrQLenPdf::7 0
-system.physmem.wrQLenPdf::8 0
-system.physmem.wrQLenPdf::9 0
-system.physmem.wrQLenPdf::10 0
-system.physmem.wrQLenPdf::11 0
-system.physmem.wrQLenPdf::12 0
-system.physmem.wrQLenPdf::13 0
-system.physmem.wrQLenPdf::14 0
-system.physmem.wrQLenPdf::15 0
-system.physmem.wrQLenPdf::16 0
-system.physmem.wrQLenPdf::17 0
-system.physmem.wrQLenPdf::18 0
-system.physmem.wrQLenPdf::19 0
-system.physmem.wrQLenPdf::20 0
-system.physmem.wrQLenPdf::21 0
-system.physmem.wrQLenPdf::22 0
-system.physmem.wrQLenPdf::23 0
-system.physmem.wrQLenPdf::24 0
-system.physmem.wrQLenPdf::25 0
-system.physmem.wrQLenPdf::26 0
-system.physmem.wrQLenPdf::27 0
-system.physmem.wrQLenPdf::28 0
-system.physmem.wrQLenPdf::29 0
-system.physmem.wrQLenPdf::30 0
-system.physmem.wrQLenPdf::31 0
-system.physmem.wrQLenPdf::32 0
-system.physmem.wrQLenPdf::33 0
-system.physmem.wrQLenPdf::34 0
-system.physmem.wrQLenPdf::35 0
-system.physmem.wrQLenPdf::36 0
-system.physmem.wrQLenPdf::37 0
-system.physmem.wrQLenPdf::38 0
-system.physmem.wrQLenPdf::39 0
-system.physmem.wrQLenPdf::40 0
-system.physmem.wrQLenPdf::41 0
-system.physmem.wrQLenPdf::42 0
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-system.membus.snoop_filter.hit_multi_requests 0
-system.membus.snoop_filter.tot_snoops 0
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-system.membus.pkt_count::total 1664
-system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 45184
-system.membus.pkt_size::total 45184
-system.membus.snoops 252
-system.membus.snoopTraffic 0
-system.membus.snoop_fanout::samples 958
-system.membus.snoop_fanout::mean 0
-system.membus.snoop_fanout::stdev 0
-system.membus.snoop_fanout::underflows 0 0.00% 0.00%
-system.membus.snoop_fanout::0 958 100.00% 100.00%
-system.membus.snoop_fanout::1 0 0.00% 100.00%
-system.membus.snoop_fanout::overflows 0 0.00% 100.00%
-system.membus.snoop_fanout::min_value 0
-system.membus.snoop_fanout::max_value 0
-system.membus.snoop_fanout::total 958
-system.membus.reqLayer0.occupancy 878500
-system.membus.reqLayer0.utilization 0.7
-system.membus.respLayer1.occupancy 3755250
-system.membus.respLayer1.utilization 3.0
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-system.toL2Bus.snoop_filter.hit_single_snoops 0
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-system.toL2Bus.pwrStateResidencyTicks::UNDEFINED 126524000
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-system.toL2Bus.trans_dist::ReadRespWithInvalidate 6
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-system.toL2Bus.trans_dist::WritebackClean 2113
-system.toL2Bus.trans_dist::CleanEvict 1
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-system.toL2Bus.trans_dist::ReadExResp 398
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-system.toL2Bus.pkt_count_system.cpu0.dcache.mem_side::system.l2c.cpu_side 604
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-system.toL2Bus.pkt_count_system.cpu3.dcache.mem_side::system.l2c.cpu_side 371
-system.toL2Bus.pkt_count::total 9482
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-system.toL2Bus.pkt_size_system.cpu2.dcache.mem_side::system.l2c.cpu_side 1600
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-system.toL2Bus.pkt_size_system.cpu3.dcache.mem_side::system.l2c.cpu_side 1664
-system.toL2Bus.pkt_size::total 331648
-system.toL2Bus.snoops 1046
-system.toL2Bus.snoopTraffic 54272
-system.toL2Bus.snoop_fanout::samples 4207
-system.toL2Bus.snoop_fanout::mean 1.309484
-system.toL2Bus.snoop_fanout::stdev 1.132145
-system.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00%
-system.toL2Bus.snoop_fanout::0 1354 32.18% 32.18%
-system.toL2Bus.snoop_fanout::1 1089 25.89% 58.07%
-system.toL2Bus.snoop_fanout::2 872 20.73% 78.80%
-system.toL2Bus.snoop_fanout::3 892 21.20% 100.00%
-system.toL2Bus.snoop_fanout::4 0 0.00% 100.00%
-system.toL2Bus.snoop_fanout::5 0 0.00% 100.00%
-system.toL2Bus.snoop_fanout::6 0 0.00% 100.00%
-system.toL2Bus.snoop_fanout::7 0 0.00% 100.00%
-system.toL2Bus.snoop_fanout::8 0 0.00% 100.00%
-system.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00%
-system.toL2Bus.snoop_fanout::min_value 0
-system.toL2Bus.snoop_fanout::max_value 3
-system.toL2Bus.snoop_fanout::total 4207
-system.toL2Bus.reqLayer0.occupancy 5288473
-system.toL2Bus.reqLayer0.utilization 4.2
-system.toL2Bus.respLayer0.occupancy 1034498
-system.toL2Bus.respLayer0.utilization 0.8
-system.toL2Bus.respLayer1.occupancy 532490
-system.toL2Bus.respLayer1.utilization 0.4
-system.toL2Bus.respLayer2.occupancy 1106497
-system.toL2Bus.respLayer2.utilization 0.9
-system.toL2Bus.respLayer3.occupancy 422474
-system.toL2Bus.respLayer3.utilization 0.3
-system.toL2Bus.respLayer4.occupancy 1006490
-system.toL2Bus.respLayer4.utilization 0.8
-system.toL2Bus.respLayer5.occupancy 458964
-system.toL2Bus.respLayer5.utilization 0.4
-system.toL2Bus.respLayer6.occupancy 1085498
-system.toL2Bus.respLayer6.utilization 0.9
-system.toL2Bus.respLayer7.occupancy 428967
-system.toL2Bus.respLayer7.utilization 0.3
-
----------- End Simulation Statistics ----------
+++ /dev/null
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu0 cpu1 cpu2 cpu3 cpu_clk_domain dvfs_handler l2c membus physmem toL2Bus voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=atomic
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu0]
-type=AtomicSimpleCPU
-children=dcache dtb icache interrupts isa itb tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu0.dtb
-eventq_index=0
-fastmem=false
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu0.interrupts
-isa=system.cpu0.isa
-itb=system.cpu0.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-simulate_data_stalls=false
-simulate_inst_stalls=false
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu0.tracer
-width=1
-workload=system.cpu0.workload
-dcache_port=system.cpu0.dcache.cpu_side
-icache_port=system.cpu0.icache.cpu_side
-
-[system.cpu0.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=4
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu0.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu0.dcache_port
-mem_side=system.toL2Bus.slave[1]
-
-[system.cpu0.dcache.tags]
-type=LRU
-assoc=4
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu0.dtb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu0.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=1
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu0.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu0.icache_port
-mem_side=system.toL2Bus.slave[0]
-
-[system.cpu0.icache.tags]
-type=LRU
-assoc=1
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu0.interrupts]
-type=SparcInterrupts
-eventq_index=0
-
-[system.cpu0.isa]
-type=SparcISA
-eventq_index=0
-
-[system.cpu0.itb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu0.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu0.workload]
-type=Process
-cmd=test_atomic 4
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/m5threads/bin/sparc/linux/test_atomic
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu1]
-type=AtomicSimpleCPU
-children=dcache dtb icache interrupts isa itb tracer
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=1
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu1.dtb
-eventq_index=0
-fastmem=false
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu1.interrupts
-isa=system.cpu1.isa
-itb=system.cpu1.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-simulate_data_stalls=false
-simulate_inst_stalls=false
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu1.tracer
-width=1
-workload=system.cpu0.workload
-dcache_port=system.cpu1.dcache.cpu_side
-icache_port=system.cpu1.icache.cpu_side
-
-[system.cpu1.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=4
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu1.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu1.dcache_port
-mem_side=system.toL2Bus.slave[3]
-
-[system.cpu1.dcache.tags]
-type=LRU
-assoc=4
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu1.dtb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu1.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=1
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu1.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu1.icache_port
-mem_side=system.toL2Bus.slave[2]
-
-[system.cpu1.icache.tags]
-type=LRU
-assoc=1
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu1.interrupts]
-type=SparcInterrupts
-eventq_index=0
-
-[system.cpu1.isa]
-type=SparcISA
-eventq_index=0
-
-[system.cpu1.itb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu1.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu2]
-type=AtomicSimpleCPU
-children=dcache dtb icache interrupts isa itb tracer
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=2
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu2.dtb
-eventq_index=0
-fastmem=false
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu2.interrupts
-isa=system.cpu2.isa
-itb=system.cpu2.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-simulate_data_stalls=false
-simulate_inst_stalls=false
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu2.tracer
-width=1
-workload=system.cpu0.workload
-dcache_port=system.cpu2.dcache.cpu_side
-icache_port=system.cpu2.icache.cpu_side
-
-[system.cpu2.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=4
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu2.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu2.dcache_port
-mem_side=system.toL2Bus.slave[5]
-
-[system.cpu2.dcache.tags]
-type=LRU
-assoc=4
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu2.dtb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu2.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=1
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu2.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu2.icache_port
-mem_side=system.toL2Bus.slave[4]
-
-[system.cpu2.icache.tags]
-type=LRU
-assoc=1
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu2.interrupts]
-type=SparcInterrupts
-eventq_index=0
-
-[system.cpu2.isa]
-type=SparcISA
-eventq_index=0
-
-[system.cpu2.itb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu2.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu3]
-type=AtomicSimpleCPU
-children=dcache dtb icache interrupts isa itb tracer
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=3
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu3.dtb
-eventq_index=0
-fastmem=false
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu3.interrupts
-isa=system.cpu3.isa
-itb=system.cpu3.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-simulate_data_stalls=false
-simulate_inst_stalls=false
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu3.tracer
-width=1
-workload=system.cpu0.workload
-dcache_port=system.cpu3.dcache.cpu_side
-icache_port=system.cpu3.icache.cpu_side
-
-[system.cpu3.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=4
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu3.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu3.dcache_port
-mem_side=system.toL2Bus.slave[7]
-
-[system.cpu3.dcache.tags]
-type=LRU
-assoc=4
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu3.dtb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu3.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=1
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu3.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu3.icache_port
-mem_side=system.toL2Bus.slave[6]
-
-[system.cpu3.icache.tags]
-type=LRU
-assoc=1
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu3.interrupts]
-type=SparcInterrupts
-eventq_index=0
-
-[system.cpu3.isa]
-type=SparcISA
-eventq_index=0
-
-[system.cpu3.itb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu3.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.l2c]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=4194304
-system=system
-tag_latency=20
-tags=system.l2c.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.l2c.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=4194304
-tag_latency=20
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.l2c.mem_side
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.l2c.cpu_side
-slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
-
-[system.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
+++ /dev/null
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0. Starting simulation...
-warn: ClockedObject: Already in the requested power state, request ignored
+++ /dev/null
-Redirecting stdout to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp/simout
-Redirecting stderr to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp/simerr
-gem5 Simulator System. http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Mar 29 2017 17:08:10
-gem5 started Mar 29 2017 17:08:19
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 126091
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp
-
-Global frequency set at 1000000000000 ticks per second
-Init done
-[Iteration 1, Thread 1] Got lock
-[Iteration 1, Thread 1] Critical section done, previously next=0, now next=1
-[Iteration 1, Thread 2] Got lock
-[Iteration 1, Thread 2] Critical section done, previously next=1, now next=2
-[Iteration 1, Thread 3] Got lock
-[Iteration 1, Thread 3] Critical section done, previously next=2, now next=3
-Iteration 1 completed
-[Iteration 2, Thread 3] Got lock
-[Iteration 2, Thread 3] Critical section done, previously next=0, now next=3
-[Iteration 2, Thread 2] Got lock
-[Iteration 2, Thread 2] Critical section done, previously next=3, now next=2
-[Iteration 2, Thread 1] Got lock
-[Iteration 2, Thread 1] Critical section done, previously next=2, now next=1
-Iteration 2 completed
-[Iteration 3, Thread 3] Got lock
-[Iteration 3, Thread 3] Critical section done, previously next=0, now next=3
-[Iteration 3, Thread 2] Got lock
-[Iteration 3, Thread 2] Critical section done, previously next=3, now next=2
-[Iteration 3, Thread 1] Got lock
-[Iteration 3, Thread 1] Critical section done, previously next=2, now next=1
-Iteration 3 completed
-[Iteration 4, Thread 2] Got lock
-[Iteration 4, Thread 2] Critical section done, previously next=0, now next=2
-[Iteration 4, Thread 3] Got lock
-[Iteration 4, Thread 3] Critical section done, previously next=2, now next=3
-[Iteration 4, Thread 1] Got lock
-[Iteration 4, Thread 1] Critical section done, previously next=3, now next=1
-Iteration 4 completed
-[Iteration 5, Thread 3] Got lock
-[Iteration 5, Thread 3] Critical section done, previously next=0, now next=3
-[Iteration 5, Thread 1] Got lock
-[Iteration 5, Thread 1] Critical section done, previously next=3, now next=1
-[Iteration 5, Thread 2] Got lock
-[Iteration 5, Thread 2] Critical section done, previously next=1, now next=2
-Iteration 5 completed
-[Iteration 6, Thread 2] Got lock
-[Iteration 6, Thread 2] Critical section done, previously next=0, now next=2
-[Iteration 6, Thread 3] Got lock
-[Iteration 6, Thread 3] Critical section done, previously next=2, now next=3
-[Iteration 6, Thread 1] Got lock
-[Iteration 6, Thread 1] Critical section done, previously next=3, now next=1
-Iteration 6 completed
-[Iteration 7, Thread 2] Got lock
-[Iteration 7, Thread 2] Critical section done, previously next=0, now next=2
-[Iteration 7, Thread 3] Got lock
-[Iteration 7, Thread 3] Critical section done, previously next=2, now next=3
-[Iteration 7, Thread 1] Got lock
-[Iteration 7, Thread 1] Critical section done, previously next=3, now next=1
-Iteration 7 completed
-[Iteration 8, Thread 2] Got lock
-[Iteration 8, Thread 2] Critical section done, previously next=0, now next=2
-[Iteration 8, Thread 1] Got lock
-[Iteration 8, Thread 1] Critical section done, previously next=2, now next=1
-[Iteration 8, Thread 3] Got lock
-[Iteration 8, Thread 3] Critical section done, previously next=1, now next=3
-Iteration 8 completed
-[Iteration 9, Thread 2] Got lock
-[Iteration 9, Thread 2] Critical section done, previously next=0, now next=2
-[Iteration 9, Thread 3] Got lock
-[Iteration 9, Thread 3] Critical section done, previously next=2, now next=3
-[Iteration 9, Thread 1] Got lock
-[Iteration 9, Thread 1] Critical section done, previously next=3, now next=1
-Iteration 9 completed
-[Iteration 10, Thread 3] Got lock
-[Iteration 10, Thread 3] Critical section done, previously next=0, now next=3
-[Iteration 10, Thread 1] Got lock
-[Iteration 10, Thread 1] Critical section done, previously next=3, now next=1
-[Iteration 10, Thread 2] Got lock
-[Iteration 10, Thread 2] Critical section done, previously next=1, now next=2
-Iteration 10 completed
-PASSED :-)
-Exiting @ tick 87707000 because exiting with last active thread context
+++ /dev/null
-
----------- Begin Simulation Statistics ----------
-sim_seconds 0.000088
-sim_ticks 87707000
-final_tick 87707000
-sim_freq 1000000000000
-host_inst_rate 1004816
-host_op_rate 1004778
-host_tick_rate 130103429
-host_mem_usage 276508
-host_seconds 0.67
-sim_insts 677333
-sim_ops 677333
-system.voltage_domain.voltage 1
-system.clk_domain.clock 1000
-system.physmem.pwrStateResidencyTicks::UNDEFINED 87707000
-system.physmem.bytes_read::cpu0.inst 18048
-system.physmem.bytes_read::cpu0.data 10560
-system.physmem.bytes_read::cpu1.inst 3968
-system.physmem.bytes_read::cpu1.data 1280
-system.physmem.bytes_read::cpu2.inst 192
-system.physmem.bytes_read::cpu2.data 832
-system.physmem.bytes_read::cpu3.inst 64
-system.physmem.bytes_read::cpu3.data 832
-system.physmem.bytes_read::total 35776
-system.physmem.bytes_inst_read::cpu0.inst 18048
-system.physmem.bytes_inst_read::cpu1.inst 3968
-system.physmem.bytes_inst_read::cpu2.inst 192
-system.physmem.bytes_inst_read::cpu3.inst 64
-system.physmem.bytes_inst_read::total 22272
-system.physmem.num_reads::cpu0.inst 282
-system.physmem.num_reads::cpu0.data 165
-system.physmem.num_reads::cpu1.inst 62
-system.physmem.num_reads::cpu1.data 20
-system.physmem.num_reads::cpu2.inst 3
-system.physmem.num_reads::cpu2.data 13
-system.physmem.num_reads::cpu3.inst 1
-system.physmem.num_reads::cpu3.data 13
-system.physmem.num_reads::total 559
-system.physmem.bw_read::cpu0.inst 205776050
-system.physmem.bw_read::cpu0.data 120400880
-system.physmem.bw_read::cpu1.inst 45241543
-system.physmem.bw_read::cpu1.data 14594046
-system.physmem.bw_read::cpu2.inst 2189107
-system.physmem.bw_read::cpu2.data 9486130
-system.physmem.bw_read::cpu3.inst 729702
-system.physmem.bw_read::cpu3.data 9486130
-system.physmem.bw_read::total 407903588
-system.physmem.bw_inst_read::cpu0.inst 205776050
-system.physmem.bw_inst_read::cpu1.inst 45241543
-system.physmem.bw_inst_read::cpu2.inst 2189107
-system.physmem.bw_inst_read::cpu3.inst 729702
-system.physmem.bw_inst_read::total 253936402
-system.physmem.bw_total::cpu0.inst 205776050
-system.physmem.bw_total::cpu0.data 120400880
-system.physmem.bw_total::cpu1.inst 45241543
-system.physmem.bw_total::cpu1.data 14594046
-system.physmem.bw_total::cpu2.inst 2189107
-system.physmem.bw_total::cpu2.data 9486130
-system.physmem.bw_total::cpu3.inst 729702
-system.physmem.bw_total::cpu3.data 9486130
-system.physmem.bw_total::total 407903588
-system.pwrStateResidencyTicks::UNDEFINED 87707000
-system.cpu_clk_domain.clock 500
-system.cpu0.workload.numSyscalls 26
-system.cpu0.pwrStateResidencyTicks::ON 87707000
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-system.cpu0.numWorkItemsStarted 0
-system.cpu0.numWorkItemsCompleted 0
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-system.cpu0.committedOps 175326
-system.cpu0.num_int_alu_accesses 120376
-system.cpu0.num_fp_alu_accesses 0
-system.cpu0.num_func_calls 390
-system.cpu0.num_conditional_control_insts 28824
-system.cpu0.num_int_insts 120376
-system.cpu0.num_fp_insts 0
-system.cpu0.num_int_register_reads 349286
-system.cpu0.num_int_register_writes 121983
-system.cpu0.num_fp_register_reads 0
-system.cpu0.num_fp_register_writes 0
-system.cpu0.num_mem_refs 82397
-system.cpu0.num_load_insts 54591
-system.cpu0.num_store_insts 27806
-system.cpu0.num_idle_cycles 0
-system.cpu0.num_busy_cycles 175415
-system.cpu0.not_idle_fraction 1
-system.cpu0.idle_fraction 0
-system.cpu0.Branches 29689
-system.cpu0.op_class::No_OpClass 26416 15.06% 15.06%
-system.cpu0.op_class::IntAlu 66491 37.91% 52.97%
-system.cpu0.op_class::IntMult 0 0.00% 52.97%
-system.cpu0.op_class::IntDiv 0 0.00% 52.97%
-system.cpu0.op_class::FloatAdd 0 0.00% 52.97%
-system.cpu0.op_class::FloatCmp 0 0.00% 52.97%
-system.cpu0.op_class::FloatCvt 0 0.00% 52.97%
-system.cpu0.op_class::FloatMult 0 0.00% 52.97%
-system.cpu0.op_class::FloatMultAcc 0 0.00% 52.97%
-system.cpu0.op_class::FloatDiv 0 0.00% 52.97%
-system.cpu0.op_class::FloatMisc 0 0.00% 52.97%
-system.cpu0.op_class::FloatSqrt 0 0.00% 52.97%
-system.cpu0.op_class::SimdAdd 0 0.00% 52.97%
-system.cpu0.op_class::SimdAddAcc 0 0.00% 52.97%
-system.cpu0.op_class::SimdAlu 0 0.00% 52.97%
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-system.cpu0.op_class::SimdCvt 0 0.00% 52.97%
-system.cpu0.op_class::SimdMisc 0 0.00% 52.97%
-system.cpu0.op_class::SimdMult 0 0.00% 52.97%
-system.cpu0.op_class::SimdMultAcc 0 0.00% 52.97%
-system.cpu0.op_class::SimdShift 0 0.00% 52.97%
-system.cpu0.op_class::SimdShiftAcc 0 0.00% 52.97%
-system.cpu0.op_class::SimdSqrt 0 0.00% 52.97%
-system.cpu0.op_class::SimdFloatAdd 0 0.00% 52.97%
-system.cpu0.op_class::SimdFloatAlu 0 0.00% 52.97%
-system.cpu0.op_class::SimdFloatCmp 0 0.00% 52.97%
-system.cpu0.op_class::SimdFloatCvt 0 0.00% 52.97%
-system.cpu0.op_class::SimdFloatDiv 0 0.00% 52.97%
-system.cpu0.op_class::SimdFloatMisc 0 0.00% 52.97%
-system.cpu0.op_class::SimdFloatMult 0 0.00% 52.97%
-system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 52.97%
-system.cpu0.op_class::SimdFloatSqrt 0 0.00% 52.97%
-system.cpu0.op_class::MemRead 54675 31.17% 84.15%
-system.cpu0.op_class::MemWrite 27806 15.85% 100.00%
-system.cpu0.op_class::FloatMemRead 0 0.00% 100.00%
-system.cpu0.op_class::FloatMemWrite 0 0.00% 100.00%
-system.cpu0.op_class::IprAccess 0 0.00% 100.00%
-system.cpu0.op_class::InstPrefetch 0 0.00% 100.00%
-system.cpu0.op_class::total 175388
-system.cpu0.dcache.tags.pwrStateResidencyTicks::UNDEFINED 87707000
-system.cpu0.dcache.tags.replacements 2
-system.cpu0.dcache.tags.tagsinuse 150.745705
-system.cpu0.dcache.tags.total_refs 81882
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-system.cpu0.dcache.tags.avg_refs 490.311377
-system.cpu0.dcache.tags.warmup_cycle 0
-system.cpu0.dcache.tags.occ_blocks::cpu0.data 150.745705
-system.cpu0.dcache.tags.occ_percent::cpu0.data 0.294425
-system.cpu0.dcache.tags.occ_percent::total 0.294425
-system.cpu0.dcache.tags.occ_task_id_blocks::1024 165
-system.cpu0.dcache.tags.age_task_id_blocks_1024::0 16
-system.cpu0.dcache.tags.age_task_id_blocks_1024::1 149
-system.cpu0.dcache.tags.occ_task_id_percent::1024 0.322266
-system.cpu0.dcache.tags.tag_accesses 329804
-system.cpu0.dcache.tags.data_accesses 329804
-system.cpu0.dcache.pwrStateResidencyTicks::UNDEFINED 87707000
-system.cpu0.dcache.ReadReq_hits::cpu0.data 54430
-system.cpu0.dcache.ReadReq_hits::total 54430
-system.cpu0.dcache.WriteReq_hits::cpu0.data 27578
-system.cpu0.dcache.WriteReq_hits::total 27578
-system.cpu0.dcache.SwapReq_hits::cpu0.data 15
-system.cpu0.dcache.SwapReq_hits::total 15
-system.cpu0.dcache.demand_hits::cpu0.data 82008
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-system.cpu0.dcache.ReadReq_misses::cpu0.data 151
-system.cpu0.dcache.ReadReq_misses::total 151
-system.cpu0.dcache.WriteReq_misses::cpu0.data 177
-system.cpu0.dcache.WriteReq_misses::total 177
-system.cpu0.dcache.SwapReq_misses::cpu0.data 27
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-system.cpu0.dcache.demand_misses::cpu0.data 328
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-system.cpu0.dcache.overall_misses::cpu0.data 328
-system.cpu0.dcache.overall_misses::total 328
-system.cpu0.dcache.ReadReq_accesses::cpu0.data 54581
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-system.cpu0.dcache.SwapReq_accesses::total 42
-system.cpu0.dcache.demand_accesses::cpu0.data 82336
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-system.cpu0.icache.ReadReq_misses::total 467
-system.cpu0.icache.demand_misses::cpu0.inst 467
-system.cpu0.icache.demand_misses::total 467
-system.cpu0.icache.overall_misses::cpu0.inst 467
-system.cpu0.icache.overall_misses::total 467
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-system.cpu0.icache.ReadReq_miss_rate::cpu0.inst 0.002663
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-system.cpu3.icache.overall_accesses::cpu3.inst 167304
-system.cpu3.icache.overall_accesses::total 167304
-system.cpu3.icache.ReadReq_miss_rate::cpu3.inst 0.002146
-system.cpu3.icache.ReadReq_miss_rate::total 0.002146
-system.cpu3.icache.demand_miss_rate::cpu3.inst 0.002146
-system.cpu3.icache.demand_miss_rate::total 0.002146
-system.cpu3.icache.overall_miss_rate::cpu3.inst 0.002146
-system.cpu3.icache.overall_miss_rate::total 0.002146
-system.cpu3.icache.blocked_cycles::no_mshrs 0
-system.cpu3.icache.blocked_cycles::no_targets 0
-system.cpu3.icache.blocked::no_mshrs 0
-system.cpu3.icache.blocked::no_targets 0
-system.cpu3.icache.avg_blocked_cycles::no_mshrs nan
-system.cpu3.icache.avg_blocked_cycles::no_targets nan
-system.cpu3.icache.writebacks::writebacks 279
-system.cpu3.icache.writebacks::total 279
-system.l2c.tags.pwrStateResidencyTicks::UNDEFINED 87707000
-system.l2c.tags.replacements 0
-system.l2c.tags.tagsinuse 498.606697
-system.l2c.tags.total_refs 1799
-system.l2c.tags.sampled_refs 559
-system.l2c.tags.avg_refs 3.218247
-system.l2c.tags.warmup_cycle 0
-system.l2c.tags.occ_blocks::cpu0.inst 239.426226
-system.l2c.tags.occ_blocks::cpu0.data 153.517433
-system.l2c.tags.occ_blocks::cpu1.inst 59.512205
-system.l2c.tags.occ_blocks::cpu1.data 19.205787
-system.l2c.tags.occ_blocks::cpu2.inst 1.942787
-system.l2c.tags.occ_blocks::cpu2.data 12.182505
-system.l2c.tags.occ_blocks::cpu3.inst 0.965459
-system.l2c.tags.occ_blocks::cpu3.data 11.854293
-system.l2c.tags.occ_percent::cpu0.inst 0.003653
-system.l2c.tags.occ_percent::cpu0.data 0.002342
-system.l2c.tags.occ_percent::cpu1.inst 0.000908
-system.l2c.tags.occ_percent::cpu1.data 0.000293
-system.l2c.tags.occ_percent::cpu2.inst 0.000030
-system.l2c.tags.occ_percent::cpu2.data 0.000186
-system.l2c.tags.occ_percent::cpu3.inst 0.000015
-system.l2c.tags.occ_percent::cpu3.data 0.000181
-system.l2c.tags.occ_percent::total 0.007608
-system.l2c.tags.occ_task_id_blocks::1024 559
-system.l2c.tags.age_task_id_blocks_1024::0 48
-system.l2c.tags.age_task_id_blocks_1024::1 511
-system.l2c.tags.occ_task_id_percent::1024 0.008530
-system.l2c.tags.tag_accesses 19423
-system.l2c.tags.data_accesses 19423
-system.l2c.pwrStateResidencyTicks::UNDEFINED 87707000
-system.l2c.WritebackDirty_hits::writebacks 1
-system.l2c.WritebackDirty_hits::total 1
-system.l2c.WritebackClean_hits::writebacks 495
-system.l2c.WritebackClean_hits::total 495
-system.l2c.UpgradeReq_hits::cpu0.data 30
-system.l2c.UpgradeReq_hits::cpu1.data 16
-system.l2c.UpgradeReq_hits::cpu2.data 17
-system.l2c.UpgradeReq_hits::cpu3.data 19
-system.l2c.UpgradeReq_hits::total 82
-system.l2c.ReadCleanReq_hits::cpu0.inst 185
-system.l2c.ReadCleanReq_hits::cpu1.inst 296
-system.l2c.ReadCleanReq_hits::cpu2.inst 355
-system.l2c.ReadCleanReq_hits::cpu3.inst 358
-system.l2c.ReadCleanReq_hits::total 1194
-system.l2c.ReadSharedReq_hits::cpu0.data 5
-system.l2c.ReadSharedReq_hits::cpu1.data 3
-system.l2c.ReadSharedReq_hits::cpu2.data 9
-system.l2c.ReadSharedReq_hits::cpu3.data 9
-system.l2c.ReadSharedReq_hits::total 26
-system.l2c.demand_hits::cpu0.inst 185
-system.l2c.demand_hits::cpu0.data 5
-system.l2c.demand_hits::cpu1.inst 296
-system.l2c.demand_hits::cpu1.data 3
-system.l2c.demand_hits::cpu2.inst 355
-system.l2c.demand_hits::cpu2.data 9
-system.l2c.demand_hits::cpu3.inst 358
-system.l2c.demand_hits::cpu3.data 9
-system.l2c.demand_hits::total 1220
-system.l2c.overall_hits::cpu0.inst 185
-system.l2c.overall_hits::cpu0.data 5
-system.l2c.overall_hits::cpu1.inst 296
-system.l2c.overall_hits::cpu1.data 3
-system.l2c.overall_hits::cpu2.inst 355
-system.l2c.overall_hits::cpu2.data 9
-system.l2c.overall_hits::cpu3.inst 358
-system.l2c.overall_hits::cpu3.data 9
-system.l2c.overall_hits::total 1220
-system.l2c.ReadExReq_misses::cpu0.data 99
-system.l2c.ReadExReq_misses::cpu1.data 13
-system.l2c.ReadExReq_misses::cpu2.data 12
-system.l2c.ReadExReq_misses::cpu3.data 12
-system.l2c.ReadExReq_misses::total 136
-system.l2c.ReadCleanReq_misses::cpu0.inst 282
-system.l2c.ReadCleanReq_misses::cpu1.inst 62
-system.l2c.ReadCleanReq_misses::cpu2.inst 3
-system.l2c.ReadCleanReq_misses::cpu3.inst 1
-system.l2c.ReadCleanReq_misses::total 348
-system.l2c.ReadSharedReq_misses::cpu0.data 66
-system.l2c.ReadSharedReq_misses::cpu1.data 7
-system.l2c.ReadSharedReq_misses::cpu2.data 1
-system.l2c.ReadSharedReq_misses::cpu3.data 1
-system.l2c.ReadSharedReq_misses::total 75
-system.l2c.demand_misses::cpu0.inst 282
-system.l2c.demand_misses::cpu0.data 165
-system.l2c.demand_misses::cpu1.inst 62
-system.l2c.demand_misses::cpu1.data 20
-system.l2c.demand_misses::cpu2.inst 3
-system.l2c.demand_misses::cpu2.data 13
-system.l2c.demand_misses::cpu3.inst 1
-system.l2c.demand_misses::cpu3.data 13
-system.l2c.demand_misses::total 559
-system.l2c.overall_misses::cpu0.inst 282
-system.l2c.overall_misses::cpu0.data 165
-system.l2c.overall_misses::cpu1.inst 62
-system.l2c.overall_misses::cpu1.data 20
-system.l2c.overall_misses::cpu2.inst 3
-system.l2c.overall_misses::cpu2.data 13
-system.l2c.overall_misses::cpu3.inst 1
-system.l2c.overall_misses::cpu3.data 13
-system.l2c.overall_misses::total 559
-system.l2c.WritebackDirty_accesses::writebacks 1
-system.l2c.WritebackDirty_accesses::total 1
-system.l2c.WritebackClean_accesses::writebacks 495
-system.l2c.WritebackClean_accesses::total 495
-system.l2c.UpgradeReq_accesses::cpu0.data 30
-system.l2c.UpgradeReq_accesses::cpu1.data 16
-system.l2c.UpgradeReq_accesses::cpu2.data 17
-system.l2c.UpgradeReq_accesses::cpu3.data 19
-system.l2c.UpgradeReq_accesses::total 82
-system.l2c.ReadExReq_accesses::cpu0.data 99
-system.l2c.ReadExReq_accesses::cpu1.data 13
-system.l2c.ReadExReq_accesses::cpu2.data 12
-system.l2c.ReadExReq_accesses::cpu3.data 12
-system.l2c.ReadExReq_accesses::total 136
-system.l2c.ReadCleanReq_accesses::cpu0.inst 467
-system.l2c.ReadCleanReq_accesses::cpu1.inst 358
-system.l2c.ReadCleanReq_accesses::cpu2.inst 358
-system.l2c.ReadCleanReq_accesses::cpu3.inst 359
-system.l2c.ReadCleanReq_accesses::total 1542
-system.l2c.ReadSharedReq_accesses::cpu0.data 71
-system.l2c.ReadSharedReq_accesses::cpu1.data 10
-system.l2c.ReadSharedReq_accesses::cpu2.data 10
-system.l2c.ReadSharedReq_accesses::cpu3.data 10
-system.l2c.ReadSharedReq_accesses::total 101
-system.l2c.demand_accesses::cpu0.inst 467
-system.l2c.demand_accesses::cpu0.data 170
-system.l2c.demand_accesses::cpu1.inst 358
-system.l2c.demand_accesses::cpu1.data 23
-system.l2c.demand_accesses::cpu2.inst 358
-system.l2c.demand_accesses::cpu2.data 22
-system.l2c.demand_accesses::cpu3.inst 359
-system.l2c.demand_accesses::cpu3.data 22
-system.l2c.demand_accesses::total 1779
-system.l2c.overall_accesses::cpu0.inst 467
-system.l2c.overall_accesses::cpu0.data 170
-system.l2c.overall_accesses::cpu1.inst 358
-system.l2c.overall_accesses::cpu1.data 23
-system.l2c.overall_accesses::cpu2.inst 358
-system.l2c.overall_accesses::cpu2.data 22
-system.l2c.overall_accesses::cpu3.inst 359
-system.l2c.overall_accesses::cpu3.data 22
-system.l2c.overall_accesses::total 1779
-system.l2c.ReadExReq_miss_rate::cpu0.data 1
-system.l2c.ReadExReq_miss_rate::cpu1.data 1
-system.l2c.ReadExReq_miss_rate::cpu2.data 1
-system.l2c.ReadExReq_miss_rate::cpu3.data 1
-system.l2c.ReadExReq_miss_rate::total 1
-system.l2c.ReadCleanReq_miss_rate::cpu0.inst 0.603854
-system.l2c.ReadCleanReq_miss_rate::cpu1.inst 0.173184
-system.l2c.ReadCleanReq_miss_rate::cpu2.inst 0.008380
-system.l2c.ReadCleanReq_miss_rate::cpu3.inst 0.002786
-system.l2c.ReadCleanReq_miss_rate::total 0.225681
-system.l2c.ReadSharedReq_miss_rate::cpu0.data 0.929577
-system.l2c.ReadSharedReq_miss_rate::cpu1.data 0.700000
-system.l2c.ReadSharedReq_miss_rate::cpu2.data 0.100000
-system.l2c.ReadSharedReq_miss_rate::cpu3.data 0.100000
-system.l2c.ReadSharedReq_miss_rate::total 0.742574
-system.l2c.demand_miss_rate::cpu0.inst 0.603854
-system.l2c.demand_miss_rate::cpu0.data 0.970588
-system.l2c.demand_miss_rate::cpu1.inst 0.173184
-system.l2c.demand_miss_rate::cpu1.data 0.869565
-system.l2c.demand_miss_rate::cpu2.inst 0.008380
-system.l2c.demand_miss_rate::cpu2.data 0.590909
-system.l2c.demand_miss_rate::cpu3.inst 0.002786
-system.l2c.demand_miss_rate::cpu3.data 0.590909
-system.l2c.demand_miss_rate::total 0.314221
-system.l2c.overall_miss_rate::cpu0.inst 0.603854
-system.l2c.overall_miss_rate::cpu0.data 0.970588
-system.l2c.overall_miss_rate::cpu1.inst 0.173184
-system.l2c.overall_miss_rate::cpu1.data 0.869565
-system.l2c.overall_miss_rate::cpu2.inst 0.008380
-system.l2c.overall_miss_rate::cpu2.data 0.590909
-system.l2c.overall_miss_rate::cpu3.inst 0.002786
-system.l2c.overall_miss_rate::cpu3.data 0.590909
-system.l2c.overall_miss_rate::total 0.314221
-system.l2c.blocked_cycles::no_mshrs 0
-system.l2c.blocked_cycles::no_targets 0
-system.l2c.blocked::no_mshrs 0
-system.l2c.blocked::no_targets 0
-system.l2c.avg_blocked_cycles::no_mshrs nan
-system.l2c.avg_blocked_cycles::no_targets nan
-system.membus.snoop_filter.tot_requests 799
-system.membus.snoop_filter.hit_single_requests 240
-system.membus.snoop_filter.hit_multi_requests 0
-system.membus.snoop_filter.tot_snoops 0
-system.membus.snoop_filter.hit_single_snoops 0
-system.membus.snoop_filter.hit_multi_snoops 0
-system.membus.pwrStateResidencyTicks::UNDEFINED 87707000
-system.membus.trans_dist::ReadResp 423
-system.membus.trans_dist::UpgradeReq 193
-system.membus.trans_dist::ReadExReq 183
-system.membus.trans_dist::ReadExResp 136
-system.membus.trans_dist::ReadSharedReq 423
-system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 1358
-system.membus.pkt_count::total 1358
-system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 35776
-system.membus.pkt_size::total 35776
-system.membus.snoops 0
-system.membus.snoopTraffic 0
-system.membus.snoop_fanout::samples 799
-system.membus.snoop_fanout::mean 0
-system.membus.snoop_fanout::stdev 0
-system.membus.snoop_fanout::underflows 0 0.00% 0.00%
-system.membus.snoop_fanout::0 799 100.00% 100.00%
-system.membus.snoop_fanout::1 0 0.00% 100.00%
-system.membus.snoop_fanout::overflows 0 0.00% 100.00%
-system.membus.snoop_fanout::min_value 0
-system.membus.snoop_fanout::max_value 0
-system.membus.snoop_fanout::total 799
-system.toL2Bus.snoop_filter.tot_requests 3918
-system.toL2Bus.snoop_filter.hit_single_requests 1142
-system.toL2Bus.snoop_filter.hit_multi_requests 1788
-system.toL2Bus.snoop_filter.tot_snoops 0
-system.toL2Bus.snoop_filter.hit_single_snoops 0
-system.toL2Bus.snoop_filter.hit_multi_snoops 0
-system.toL2Bus.pwrStateResidencyTicks::UNDEFINED 87707000
-system.toL2Bus.trans_dist::ReadResp 2179
-system.toL2Bus.trans_dist::WritebackDirty 1
-system.toL2Bus.trans_dist::WritebackClean 1050
-system.toL2Bus.trans_dist::CleanEvict 1
-system.toL2Bus.trans_dist::UpgradeReq 275
-system.toL2Bus.trans_dist::UpgradeResp 275
-system.toL2Bus.trans_dist::ReadExReq 412
-system.toL2Bus.trans_dist::ReadExResp 412
-system.toL2Bus.trans_dist::ReadCleanReq 1542
-system.toL2Bus.trans_dist::ReadSharedReq 637
-system.toL2Bus.pkt_count_system.cpu0.icache.mem_side::system.l2c.cpu_side 1149
-system.toL2Bus.pkt_count_system.cpu0.dcache.mem_side::system.l2c.cpu_side 712
-system.toL2Bus.pkt_count_system.cpu1.icache.mem_side::system.l2c.cpu_side 994
-system.toL2Bus.pkt_count_system.cpu1.dcache.mem_side::system.l2c.cpu_side 696
-system.toL2Bus.pkt_count_system.cpu2.icache.mem_side::system.l2c.cpu_side 994
-system.toL2Bus.pkt_count_system.cpu2.dcache.mem_side::system.l2c.cpu_side 618
-system.toL2Bus.pkt_count_system.cpu3.icache.mem_side::system.l2c.cpu_side 997
-system.toL2Bus.pkt_count_system.cpu3.dcache.mem_side::system.l2c.cpu_side 624
-system.toL2Bus.pkt_count::total 6784
-system.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.l2c.cpu_side 43648
-system.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.l2c.cpu_side 18752
-system.toL2Bus.pkt_size_system.cpu1.icache.mem_side::system.l2c.cpu_side 40704
-system.toL2Bus.pkt_size_system.cpu1.dcache.mem_side::system.l2c.cpu_side 17600
-system.toL2Bus.pkt_size_system.cpu2.icache.mem_side::system.l2c.cpu_side 40704
-system.toL2Bus.pkt_size_system.cpu2.dcache.mem_side::system.l2c.cpu_side 15424
-system.toL2Bus.pkt_size_system.cpu3.icache.mem_side::system.l2c.cpu_side 40832
-system.toL2Bus.pkt_size_system.cpu3.dcache.mem_side::system.l2c.cpu_side 15424
-system.toL2Bus.pkt_size::total 233088
-system.toL2Bus.snoops 0
-system.toL2Bus.snoopTraffic 0
-system.toL2Bus.snoop_fanout::samples 3918
-system.toL2Bus.snoop_fanout::mean 1.279735
-system.toL2Bus.snoop_fanout::stdev 1.218885
-system.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00%
-system.toL2Bus.snoop_fanout::0 1485 37.90% 37.90%
-system.toL2Bus.snoop_fanout::1 882 22.51% 60.41%
-system.toL2Bus.snoop_fanout::2 521 13.30% 73.71%
-system.toL2Bus.snoop_fanout::3 1030 26.29% 100.00%
-system.toL2Bus.snoop_fanout::4 0 0.00% 100.00%
-system.toL2Bus.snoop_fanout::5 0 0.00% 100.00%
-system.toL2Bus.snoop_fanout::6 0 0.00% 100.00%
-system.toL2Bus.snoop_fanout::7 0 0.00% 100.00%
-system.toL2Bus.snoop_fanout::8 0 0.00% 100.00%
-system.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00%
-system.toL2Bus.snoop_fanout::min_value 0
-system.toL2Bus.snoop_fanout::max_value 3
-system.toL2Bus.snoop_fanout::total 3918
-
----------- End Simulation Statistics ----------
+++ /dev/null
-[root]
-type=Root
-children=system
-dummy=0
-
-[system]
-type=System
-children=cpu0 cpu1 cpu2 cpu3 membus physmem
-mem_mode=timing
-physmem=system.physmem
-
-[system.cpu0]
-type=TimingSimpleCPU
-children=dtb itb tracer workload
-checker=Null
-clock=500
-cpu_id=0
-defer_registration=false
-do_checkpoint_insts=true
-do_statistics_insts=true
-dtb=system.cpu0.dtb
-function_trace=false
-function_trace_start=0
-itb=system.cpu0.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-phase=0
-progress_interval=0
-system=system
-tracer=system.cpu0.tracer
-workload=system.cpu0.workload
-dcache_port=system.membus.port[1]
-icache_port=system.membus.port[0]
-
-[system.cpu0.dtb]
-type=SparcTLB
-size=64
-
-[system.cpu0.itb]
-type=SparcTLB
-size=64
-
-[system.cpu0.tracer]
-type=ExeTracer
-
-[system.cpu0.workload]
-type=LiveProcess
-cmd=test_atomic 4
-cwd=
-egid=100
-env=
-errout=cerr
-euid=100
-executable=/dist/m5/regression/test-progs/m5threads/bin/sparc/linux/test_atomic
-gid=100
-input=cin
-max_stack_size=67108864
-output=cout
-pid=100
-ppid=99
-simpoint=0
-system=system
-uid=100
-
-[system.cpu1]
-type=TimingSimpleCPU
-children=dtb itb tracer
-checker=Null
-clock=500
-cpu_id=1
-defer_registration=false
-do_checkpoint_insts=true
-do_statistics_insts=true
-dtb=system.cpu1.dtb
-function_trace=false
-function_trace_start=0
-itb=system.cpu1.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-phase=0
-progress_interval=0
-system=system
-tracer=system.cpu1.tracer
-workload=system.cpu0.workload
-dcache_port=system.membus.port[3]
-icache_port=system.membus.port[2]
-
-[system.cpu1.dtb]
-type=SparcTLB
-size=64
-
-[system.cpu1.itb]
-type=SparcTLB
-size=64
-
-[system.cpu1.tracer]
-type=ExeTracer
-
-[system.cpu2]
-type=TimingSimpleCPU
-children=dtb itb tracer
-checker=Null
-clock=500
-cpu_id=2
-defer_registration=false
-do_checkpoint_insts=true
-do_statistics_insts=true
-dtb=system.cpu2.dtb
-function_trace=false
-function_trace_start=0
-itb=system.cpu2.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-phase=0
-progress_interval=0
-system=system
-tracer=system.cpu2.tracer
-workload=system.cpu0.workload
-dcache_port=system.membus.port[5]
-icache_port=system.membus.port[4]
-
-[system.cpu2.dtb]
-type=SparcTLB
-size=64
-
-[system.cpu2.itb]
-type=SparcTLB
-size=64
-
-[system.cpu2.tracer]
-type=ExeTracer
-
-[system.cpu3]
-type=TimingSimpleCPU
-children=dtb itb tracer
-checker=Null
-clock=500
-cpu_id=3
-defer_registration=false
-do_checkpoint_insts=true
-do_statistics_insts=true
-dtb=system.cpu3.dtb
-function_trace=false
-function_trace_start=0
-itb=system.cpu3.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-phase=0
-progress_interval=0
-system=system
-tracer=system.cpu3.tracer
-workload=system.cpu0.workload
-dcache_port=system.membus.port[7]
-icache_port=system.membus.port[6]
-
-[system.cpu3.dtb]
-type=SparcTLB
-size=64
-
-[system.cpu3.itb]
-type=SparcTLB
-size=64
-
-[system.cpu3.tracer]
-type=ExeTracer
-
-[system.membus]
-type=Bus
-block_size=64
-bus_id=0
-clock=1000
-header_cycles=1
-use_default_range=false
-width=64
-port=system.cpu0.icache_port system.cpu0.dcache_port system.cpu1.icache_port system.cpu1.dcache_port system.cpu2.icache_port system.cpu2.dcache_port system.cpu3.icache_port system.cpu3.dcache_port system.physmem.port[0]
-
-[system.physmem]
-type=RubyMemory
-clock=1
-config_file=
-config_options=
-debug=false
-debug_file=
-file=
-latency=30000
-latency_var=0
-null=false
-num_cpus=4
-phase=0
-range=0:134217727
-stats_file=ruby.stats
-zero=false
-port=system.membus.port[8]
-
+++ /dev/null
-warn: Sockets disabled, not accepting gdb connections
-For more information see: http://www.m5sim.org/warn/d946bea6
-hack: be nice to actually delete the event here
+++ /dev/null
-M5 Simulator System
-
-Copyright (c) 2001-2008
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled May 5 2009 07:34:00
-M5 revision 8bea207e2193 6172 default qtip tip ruby_tests_refs.diff
-M5 started May 5 2009 07:34:02
-M5 executing on piton
-command line: /n/piton/z/nate/build/xgem5/build/SPARC_SE/m5.fast -d /n/piton/z/nate/build/xgem5/build/SPARC_SE/tests/fast/quick/40.m5threads-test-atomic/sparc/linux/simple-timing-mp-ruby -re tests/run.py /n/piton/z/nate/build/xgem5/build/SPARC_SE/tests/fast/quick/40.m5threads-test-atomic/sparc/linux/simple-timing-mp-ruby
-Global frequency set at 1000000000000 ticks per second
-Ruby Timing Mode
-Creating event queue...
-Creating event queue done
-Creating system...
- Processors: 4
-Creating system done
-Ruby initialization complete
-info: Entering event queue @ 0. Starting simulation...
-Init done
-[Iteration 1, Thread 1] Got lock
-[Iteration 1, Thread 1] Critical section done, previously next=0, now next=1
-[Iteration 1, Thread 3] Got lock
-[Iteration 1, Thread 3] Critical section done, previously next=1, now next=3
-[Iteration 1, Thread 2] Got lock
-[Iteration 1, Thread 2] Critical section done, previously next=3, now next=2
-Iteration 1 completed
-[Iteration 2, Thread 3] Got lock
-[Iteration 2, Thread 3] Critical section done, previously next=0, now next=3
-[Iteration 2, Thread 1] Got lock
-[Iteration 2, Thread 1] Critical section done, previously next=3, now next=1
-[Iteration 2, Thread 2] Got lock
-[Iteration 2, Thread 2] Critical section done, previously next=1, now next=2
-Iteration 2 completed
-[Iteration 3, Thread 2] Got lock
-[Iteration 3, Thread 2] Critical section done, previously next=0, now next=2
-[Iteration 3, Thread 3] Got lock
-[Iteration 3, Thread 3] Critical section done, previously next=2, now next=3
-[Iteration 3, Thread 1] Got lock
-[Iteration 3, Thread 1] Critical section done, previously next=3, now next=1
-Iteration 3 completed
-[Iteration 4, Thread 2] Got lock
-[Iteration 4, Thread 2] Critical section done, previously next=0, now next=2
-[Iteration 4, Thread 1] Got lock
-[Iteration 4, Thread 1] Critical section done, previously next=2, now next=1
-[Iteration 4, Thread 3] Got lock
-[Iteration 4, Thread 3] Critical section done, previously next=1, now next=3
-Iteration 4 completed
-[Iteration 5, Thread 3] Got lock
-[Iteration 5, Thread 3] Critical section done, previously next=0, now next=3
-[Iteration 5, Thread 2] Got lock
-[Iteration 5, Thread 2] Critical section done, previously next=3, now next=2
-[Iteration 5, Thread 1] Got lock
-[Iteration 5, Thread 1] Critical section done, previously next=2, now next=1
-Iteration 5 completed
-[Iteration 6, Thread 1] Got lock
-[Iteration 6, Thread 1] Critical section done, previously next=0, now next=1
-[Iteration 6, Thread 3] Got lock
-[Iteration 6, Thread 3] Critical section done, previously next=1, now next=3
-[Iteration 6, Thread 2] Got lock
-[Iteration 6, Thread 2] Critical section done, previously next=3, now next=2
-Iteration 6 completed
-[Iteration 7, Thread 3] Got lock
-[Iteration 7, Thread 3] Critical section done, previously next=0, now next=3
-[Iteration 7, Thread 2] Got lock
-[Iteration 7, Thread 2] Critical section done, previously next=3, now next=2
-[Iteration 7, Thread 1] Got lock
-[Iteration 7, Thread 1] Critical section done, previously next=2, now next=1
-Iteration 7 completed
-[Iteration 8, Thread 3] Got lock
-[Iteration 8, Thread 3] Critical section done, previously next=0, now next=3
-[Iteration 8, Thread 1] Got lock
-[Iteration 8, Thread 1] Critical section done, previously next=3, now next=1
-[Iteration 8, Thread 2] Got lock
-[Iteration 8, Thread 2] Critical section done, previously next=1, now next=2
-Iteration 8 completed
-[Iteration 9, Thread 1] Got lock
-[Iteration 9, Thread 1] Critical section done, previously next=0, now next=1
-[Iteration 9, Thread 2] Got lock
-[Iteration 9, Thread 2] Critical section done, previously next=1, now next=2
-[Iteration 9, Thread 3] Got lock
-[Iteration 9, Thread 3] Critical section done, previously next=2, now next=3
-Iteration 9 completed
-[Iteration 10, Thread 1] Got lock
-[Iteration 10, Thread 1] Critical section done, previously next=0, now next=1
-[Iteration 10, Thread 3] Got lock
-[Iteration 10, Thread 3] Critical section done, previously next=1, now next=3
-[Iteration 10, Thread 2] Got lock
-[Iteration 10, Thread 2] Critical section done, previously next=3, now next=2
-Iteration 10 completed
-PASSED :-)
-Exiting @ tick 2480212000 because target called exit()
+++ /dev/null
-Skipping for now due to broken atomics in ruby
+++ /dev/null
-
----------- Begin Simulation Statistics ----------
-host_inst_rate 15492 # Simulator instruction rate (inst/s)
-host_mem_usage 258096 # Number of bytes of host memory used
-host_seconds 39.33 # Real time elapsed on the host
-host_tick_rate 63054672 # Simulator tick rate (ticks/s)
-sim_freq 1000000000000 # Frequency of simulated ticks
-sim_insts 609352 # Number of instructions simulated
-sim_seconds 0.002480 # Number of seconds simulated
-sim_ticks 2480212000 # Number of ticks simulated
-system.cpu0.idle_fraction 0.011975 # Percentage of idle cycles
-system.cpu0.not_idle_fraction 0.988025 # Percentage of non-idle cycles
-system.cpu0.numCycles 4944742 # number of cpu cycles simulated
-system.cpu0.num_insts 156931 # Number of instructions executed
-system.cpu0.num_refs 47256 # Number of memory references
-system.cpu0.workload.PROG:numSyscalls 89 # Number of system calls
-system.cpu1.idle_fraction 0.012259 # Percentage of idle cycles
-system.cpu1.not_idle_fraction 0.987741 # Percentage of non-idle cycles
-system.cpu1.numCycles 4944666 # number of cpu cycles simulated
-system.cpu1.num_insts 152657 # Number of instructions executed
-system.cpu1.num_refs 51452 # Number of memory references
-system.cpu2.idle_fraction 0 # Percentage of idle cycles
-system.cpu2.not_idle_fraction 1 # Percentage of non-idle cycles
-system.cpu2.numCycles 4960424 # number of cpu cycles simulated
-system.cpu2.num_insts 146173 # Number of instructions executed
-system.cpu2.num_refs 67815 # Number of memory references
-system.cpu3.idle_fraction 0.011794 # Percentage of idle cycles
-system.cpu3.not_idle_fraction 0.988206 # Percentage of non-idle cycles
-system.cpu3.numCycles 4944758 # number of cpu cycles simulated
-system.cpu3.num_insts 153591 # Number of instructions executed
-system.cpu3.num_refs 50671 # Number of memory references
-
----------- End Simulation Statistics ----------
+++ /dev/null
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu0 cpu1 cpu2 cpu3 cpu_clk_domain dvfs_handler l2c membus physmem toL2Bus voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu0]
-type=TimingSimpleCPU
-children=dcache dtb icache interrupts isa itb tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu0.dtb
-eventq_index=0
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu0.interrupts
-isa=system.cpu0.isa
-itb=system.cpu0.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu0.tracer
-workload=system.cpu0.workload
-dcache_port=system.cpu0.dcache.cpu_side
-icache_port=system.cpu0.icache.cpu_side
-
-[system.cpu0.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=4
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu0.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu0.dcache_port
-mem_side=system.toL2Bus.slave[1]
-
-[system.cpu0.dcache.tags]
-type=LRU
-assoc=4
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu0.dtb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu0.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=1
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu0.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu0.icache_port
-mem_side=system.toL2Bus.slave[0]
-
-[system.cpu0.icache.tags]
-type=LRU
-assoc=1
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu0.interrupts]
-type=SparcInterrupts
-eventq_index=0
-
-[system.cpu0.isa]
-type=SparcISA
-eventq_index=0
-
-[system.cpu0.itb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu0.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu0.workload]
-type=Process
-cmd=test_atomic 4
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/m5threads/bin/sparc/linux/test_atomic
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu1]
-type=TimingSimpleCPU
-children=dcache dtb icache interrupts isa itb tracer
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=1
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu1.dtb
-eventq_index=0
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu1.interrupts
-isa=system.cpu1.isa
-itb=system.cpu1.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu1.tracer
-workload=system.cpu0.workload
-dcache_port=system.cpu1.dcache.cpu_side
-icache_port=system.cpu1.icache.cpu_side
-
-[system.cpu1.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=4
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu1.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu1.dcache_port
-mem_side=system.toL2Bus.slave[3]
-
-[system.cpu1.dcache.tags]
-type=LRU
-assoc=4
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu1.dtb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu1.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=1
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu1.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu1.icache_port
-mem_side=system.toL2Bus.slave[2]
-
-[system.cpu1.icache.tags]
-type=LRU
-assoc=1
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu1.interrupts]
-type=SparcInterrupts
-eventq_index=0
-
-[system.cpu1.isa]
-type=SparcISA
-eventq_index=0
-
-[system.cpu1.itb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu1.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu2]
-type=TimingSimpleCPU
-children=dcache dtb icache interrupts isa itb tracer
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=2
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu2.dtb
-eventq_index=0
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu2.interrupts
-isa=system.cpu2.isa
-itb=system.cpu2.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu2.tracer
-workload=system.cpu0.workload
-dcache_port=system.cpu2.dcache.cpu_side
-icache_port=system.cpu2.icache.cpu_side
-
-[system.cpu2.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=4
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu2.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu2.dcache_port
-mem_side=system.toL2Bus.slave[5]
-
-[system.cpu2.dcache.tags]
-type=LRU
-assoc=4
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu2.dtb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu2.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=1
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu2.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu2.icache_port
-mem_side=system.toL2Bus.slave[4]
-
-[system.cpu2.icache.tags]
-type=LRU
-assoc=1
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu2.interrupts]
-type=SparcInterrupts
-eventq_index=0
-
-[system.cpu2.isa]
-type=SparcISA
-eventq_index=0
-
-[system.cpu2.itb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu2.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu3]
-type=TimingSimpleCPU
-children=dcache dtb icache interrupts isa itb tracer
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=3
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu3.dtb
-eventq_index=0
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu3.interrupts
-isa=system.cpu3.isa
-itb=system.cpu3.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu3.tracer
-workload=system.cpu0.workload
-dcache_port=system.cpu3.dcache.cpu_side
-icache_port=system.cpu3.icache.cpu_side
-
-[system.cpu3.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=4
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu3.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu3.dcache_port
-mem_side=system.toL2Bus.slave[7]
-
-[system.cpu3.dcache.tags]
-type=LRU
-assoc=4
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu3.dtb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu3.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=1
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu3.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu3.icache_port
-mem_side=system.toL2Bus.slave[6]
-
-[system.cpu3.icache.tags]
-type=LRU
-assoc=1
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu3.interrupts]
-type=SparcInterrupts
-eventq_index=0
-
-[system.cpu3.isa]
-type=SparcISA
-eventq_index=0
-
-[system.cpu3.itb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu3.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.l2c]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=4194304
-system=system
-tag_latency=20
-tags=system.l2c.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.l2c.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=4194304
-tag_latency=20
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.l2c.mem_side
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.l2c.cpu_side
-slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
-
-[system.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
+++ /dev/null
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0. Starting simulation...
-warn: ClockedObject: Already in the requested power state, request ignored
+++ /dev/null
-Redirecting stdout to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp/simout
-Redirecting stderr to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp/simerr
-gem5 Simulator System. http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Mar 29 2017 17:08:10
-gem5 started Mar 29 2017 17:08:19
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 126092
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp
-
-Global frequency set at 1000000000000 ticks per second
-Init done
-[Iteration 1, Thread 2] Got lock
-[Iteration 1, Thread 2] Critical section done, previously next=0, now next=2
-[Iteration 1, Thread 1] Got lock
-[Iteration 1, Thread 1] Critical section done, previously next=2, now next=1
-[Iteration 1, Thread 3] Got lock
-[Iteration 1, Thread 3] Critical section done, previously next=1, now next=3
-Iteration 1 completed
-[Iteration 2, Thread 3] Got lock
-[Iteration 2, Thread 3] Critical section done, previously next=0, now next=3
-[Iteration 2, Thread 1] Got lock
-[Iteration 2, Thread 1] Critical section done, previously next=3, now next=1
-[Iteration 2, Thread 2] Got lock
-[Iteration 2, Thread 2] Critical section done, previously next=1, now next=2
-Iteration 2 completed
-[Iteration 3, Thread 2] Got lock
-[Iteration 3, Thread 2] Critical section done, previously next=0, now next=2
-[Iteration 3, Thread 3] Got lock
-[Iteration 3, Thread 3] Critical section done, previously next=2, now next=3
-[Iteration 3, Thread 1] Got lock
-[Iteration 3, Thread 1] Critical section done, previously next=3, now next=1
-Iteration 3 completed
-[Iteration 4, Thread 1] Got lock
-[Iteration 4, Thread 1] Critical section done, previously next=0, now next=1
-[Iteration 4, Thread 2] Got lock
-[Iteration 4, Thread 2] Critical section done, previously next=1, now next=2
-[Iteration 4, Thread 3] Got lock
-[Iteration 4, Thread 3] Critical section done, previously next=2, now next=3
-Iteration 4 completed
-[Iteration 5, Thread 3] Got lock
-[Iteration 5, Thread 3] Critical section done, previously next=0, now next=3
-[Iteration 5, Thread 1] Got lock
-[Iteration 5, Thread 1] Critical section done, previously next=3, now next=1
-[Iteration 5, Thread 2] Got lock
-[Iteration 5, Thread 2] Critical section done, previously next=1, now next=2
-Iteration 5 completed
-[Iteration 6, Thread 2] Got lock
-[Iteration 6, Thread 2] Critical section done, previously next=0, now next=2
-[Iteration 6, Thread 3] Got lock
-[Iteration 6, Thread 3] Critical section done, previously next=2, now next=3
-[Iteration 6, Thread 1] Got lock
-[Iteration 6, Thread 1] Critical section done, previously next=3, now next=1
-Iteration 6 completed
-[Iteration 7, Thread 1] Got lock
-[Iteration 7, Thread 1] Critical section done, previously next=0, now next=1
-[Iteration 7, Thread 2] Got lock
-[Iteration 7, Thread 2] Critical section done, previously next=1, now next=2
-[Iteration 7, Thread 3] Got lock
-[Iteration 7, Thread 3] Critical section done, previously next=2, now next=3
-Iteration 7 completed
-[Iteration 8, Thread 3] Got lock
-[Iteration 8, Thread 3] Critical section done, previously next=0, now next=3
-[Iteration 8, Thread 1] Got lock
-[Iteration 8, Thread 1] Critical section done, previously next=3, now next=1
-[Iteration 8, Thread 2] Got lock
-[Iteration 8, Thread 2] Critical section done, previously next=1, now next=2
-Iteration 8 completed
-[Iteration 9, Thread 2] Got lock
-[Iteration 9, Thread 2] Critical section done, previously next=0, now next=2
-[Iteration 9, Thread 3] Got lock
-[Iteration 9, Thread 3] Critical section done, previously next=2, now next=3
-[Iteration 9, Thread 1] Got lock
-[Iteration 9, Thread 1] Critical section done, previously next=3, now next=1
-Iteration 9 completed
-[Iteration 10, Thread 1] Got lock
-[Iteration 10, Thread 1] Critical section done, previously next=0, now next=1
-[Iteration 10, Thread 2] Got lock
-[Iteration 10, Thread 2] Critical section done, previously next=1, now next=2
-[Iteration 10, Thread 3] Got lock
-[Iteration 10, Thread 3] Critical section done, previously next=2, now next=3
-Iteration 10 completed
-PASSED :-)
-Exiting @ tick 263409500 because exiting with last active thread context
+++ /dev/null
-
----------- Begin Simulation Statistics ----------
-sim_seconds 0.000263
-sim_ticks 263409500
-final_tick 263409500
-sim_freq 1000000000000
-host_inst_rate 743335
-host_op_rate 743323
-host_tick_rate 294930057
-host_mem_usage 276508
-host_seconds 0.89
-sim_insts 663871
-sim_ops 663871
-system.voltage_domain.voltage 1
-system.clk_domain.clock 1000
-system.physmem.pwrStateResidencyTicks::UNDEFINED 263409500
-system.physmem.bytes_read::cpu0.inst 18240
-system.physmem.bytes_read::cpu0.data 10560
-system.physmem.bytes_read::cpu1.inst 640
-system.physmem.bytes_read::cpu1.data 960
-system.physmem.bytes_read::cpu2.inst 3712
-system.physmem.bytes_read::cpu2.data 1472
-system.physmem.bytes_read::cpu3.inst 64
-system.physmem.bytes_read::cpu3.data 960
-system.physmem.bytes_read::total 36608
-system.physmem.bytes_inst_read::cpu0.inst 18240
-system.physmem.bytes_inst_read::cpu1.inst 640
-system.physmem.bytes_inst_read::cpu2.inst 3712
-system.physmem.bytes_inst_read::cpu3.inst 64
-system.physmem.bytes_inst_read::total 22656
-system.physmem.num_reads::cpu0.inst 285
-system.physmem.num_reads::cpu0.data 165
-system.physmem.num_reads::cpu1.inst 10
-system.physmem.num_reads::cpu1.data 15
-system.physmem.num_reads::cpu2.inst 58
-system.physmem.num_reads::cpu2.data 23
-system.physmem.num_reads::cpu3.inst 1
-system.physmem.num_reads::cpu3.data 15
-system.physmem.num_reads::total 572
-system.physmem.bw_read::cpu0.inst 69245794
-system.physmem.bw_read::cpu0.data 40089670
-system.physmem.bw_read::cpu1.inst 2429677
-system.physmem.bw_read::cpu1.data 3644515
-system.physmem.bw_read::cpu2.inst 14092127
-system.physmem.bw_read::cpu2.data 5588257
-system.physmem.bw_read::cpu3.inst 242968
-system.physmem.bw_read::cpu3.data 3644515
-system.physmem.bw_read::total 138977524
-system.physmem.bw_inst_read::cpu0.inst 69245794
-system.physmem.bw_inst_read::cpu1.inst 2429677
-system.physmem.bw_inst_read::cpu2.inst 14092127
-system.physmem.bw_inst_read::cpu3.inst 242968
-system.physmem.bw_inst_read::total 86010565
-system.physmem.bw_total::cpu0.inst 69245794
-system.physmem.bw_total::cpu0.data 40089670
-system.physmem.bw_total::cpu1.inst 2429677
-system.physmem.bw_total::cpu1.data 3644515
-system.physmem.bw_total::cpu2.inst 14092127
-system.physmem.bw_total::cpu2.data 5588257
-system.physmem.bw_total::cpu3.inst 242968
-system.physmem.bw_total::cpu3.data 3644515
-system.physmem.bw_total::total 138977524
-system.pwrStateResidencyTicks::UNDEFINED 263409500
-system.cpu_clk_domain.clock 500
-system.cpu0.workload.numSyscalls 26
-system.cpu0.pwrStateResidencyTicks::ON 263409500
-system.cpu0.numCycles 526819
-system.cpu0.numWorkItemsStarted 0
-system.cpu0.numWorkItemsCompleted 0
-system.cpu0.committedInsts 158244
-system.cpu0.committedOps 158244
-system.cpu0.num_int_alu_accesses 108988
-system.cpu0.num_fp_alu_accesses 0
-system.cpu0.num_func_calls 390
-system.cpu0.num_conditional_control_insts 25977
-system.cpu0.num_int_insts 108988
-system.cpu0.num_fp_insts 0
-system.cpu0.num_int_register_reads 315122
-system.cpu0.num_int_register_writes 110594
-system.cpu0.num_fp_register_reads 0
-system.cpu0.num_fp_register_writes 0
-system.cpu0.num_mem_refs 73856
-system.cpu0.num_load_insts 48897
-system.cpu0.num_store_insts 24959
-system.cpu0.num_idle_cycles 0
-system.cpu0.num_busy_cycles 526819
-system.cpu0.not_idle_fraction 1
-system.cpu0.idle_fraction 0
-system.cpu0.Branches 26842
-system.cpu0.op_class::No_OpClass 23569 14.89% 14.89%
-system.cpu0.op_class::IntAlu 60797 38.40% 53.29%
-system.cpu0.op_class::IntMult 0 0.00% 53.29%
-system.cpu0.op_class::IntDiv 0 0.00% 53.29%
-system.cpu0.op_class::FloatAdd 0 0.00% 53.29%
-system.cpu0.op_class::FloatCmp 0 0.00% 53.29%
-system.cpu0.op_class::FloatCvt 0 0.00% 53.29%
-system.cpu0.op_class::FloatMult 0 0.00% 53.29%
-system.cpu0.op_class::FloatMultAcc 0 0.00% 53.29%
-system.cpu0.op_class::FloatDiv 0 0.00% 53.29%
-system.cpu0.op_class::FloatMisc 0 0.00% 53.29%
-system.cpu0.op_class::FloatSqrt 0 0.00% 53.29%
-system.cpu0.op_class::SimdAdd 0 0.00% 53.29%
-system.cpu0.op_class::SimdAddAcc 0 0.00% 53.29%
-system.cpu0.op_class::SimdAlu 0 0.00% 53.29%
-system.cpu0.op_class::SimdCmp 0 0.00% 53.29%
-system.cpu0.op_class::SimdCvt 0 0.00% 53.29%
-system.cpu0.op_class::SimdMisc 0 0.00% 53.29%
-system.cpu0.op_class::SimdMult 0 0.00% 53.29%
-system.cpu0.op_class::SimdMultAcc 0 0.00% 53.29%
-system.cpu0.op_class::SimdShift 0 0.00% 53.29%
-system.cpu0.op_class::SimdShiftAcc 0 0.00% 53.29%
-system.cpu0.op_class::SimdSqrt 0 0.00% 53.29%
-system.cpu0.op_class::SimdFloatAdd 0 0.00% 53.29%
-system.cpu0.op_class::SimdFloatAlu 0 0.00% 53.29%
-system.cpu0.op_class::SimdFloatCmp 0 0.00% 53.29%
-system.cpu0.op_class::SimdFloatCvt 0 0.00% 53.29%
-system.cpu0.op_class::SimdFloatDiv 0 0.00% 53.29%
-system.cpu0.op_class::SimdFloatMisc 0 0.00% 53.29%
-system.cpu0.op_class::SimdFloatMult 0 0.00% 53.29%
-system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 53.29%
-system.cpu0.op_class::SimdFloatSqrt 0 0.00% 53.29%
-system.cpu0.op_class::MemRead 48981 30.94% 84.23%
-system.cpu0.op_class::MemWrite 24959 15.77% 100.00%
-system.cpu0.op_class::FloatMemRead 0 0.00% 100.00%
-system.cpu0.op_class::FloatMemWrite 0 0.00% 100.00%
-system.cpu0.op_class::IprAccess 0 0.00% 100.00%
-system.cpu0.op_class::InstPrefetch 0 0.00% 100.00%
-system.cpu0.op_class::total 158306
-system.cpu0.dcache.tags.pwrStateResidencyTicks::UNDEFINED 263409500
-system.cpu0.dcache.tags.replacements 2
-system.cpu0.dcache.tags.tagsinuse 144.946606
-system.cpu0.dcache.tags.total_refs 73324
-system.cpu0.dcache.tags.sampled_refs 167
-system.cpu0.dcache.tags.avg_refs 439.065868
-system.cpu0.dcache.tags.warmup_cycle 0
-system.cpu0.dcache.tags.occ_blocks::cpu0.data 144.946606
-system.cpu0.dcache.tags.occ_percent::cpu0.data 0.283099
-system.cpu0.dcache.tags.occ_percent::total 0.283099
-system.cpu0.dcache.tags.occ_task_id_blocks::1024 165
-system.cpu0.dcache.tags.age_task_id_blocks_1024::0 16
-system.cpu0.dcache.tags.age_task_id_blocks_1024::2 149
-system.cpu0.dcache.tags.occ_task_id_percent::1024 0.322266
-system.cpu0.dcache.tags.tag_accesses 295657
-system.cpu0.dcache.tags.data_accesses 295657
-system.cpu0.dcache.pwrStateResidencyTicks::UNDEFINED 263409500
-system.cpu0.dcache.ReadReq_hits::cpu0.data 48717
-system.cpu0.dcache.ReadReq_hits::total 48717
-system.cpu0.dcache.WriteReq_hits::cpu0.data 24725
-system.cpu0.dcache.WriteReq_hits::total 24725
-system.cpu0.dcache.SwapReq_hits::cpu0.data 16
-system.cpu0.dcache.SwapReq_hits::total 16
-system.cpu0.dcache.demand_hits::cpu0.data 73442
-system.cpu0.dcache.demand_hits::total 73442
-system.cpu0.dcache.overall_hits::cpu0.data 73442
-system.cpu0.dcache.overall_hits::total 73442
-system.cpu0.dcache.ReadReq_misses::cpu0.data 170
-system.cpu0.dcache.ReadReq_misses::total 170
-system.cpu0.dcache.WriteReq_misses::cpu0.data 183
-system.cpu0.dcache.WriteReq_misses::total 183
-system.cpu0.dcache.SwapReq_misses::cpu0.data 26
-system.cpu0.dcache.SwapReq_misses::total 26
-system.cpu0.dcache.demand_misses::cpu0.data 353
-system.cpu0.dcache.demand_misses::total 353
-system.cpu0.dcache.overall_misses::cpu0.data 353
-system.cpu0.dcache.overall_misses::total 353
-system.cpu0.dcache.ReadReq_miss_latency::cpu0.data 4701000
-system.cpu0.dcache.ReadReq_miss_latency::total 4701000
-system.cpu0.dcache.WriteReq_miss_latency::cpu0.data 6585500
-system.cpu0.dcache.WriteReq_miss_latency::total 6585500
-system.cpu0.dcache.SwapReq_miss_latency::cpu0.data 400000
-system.cpu0.dcache.SwapReq_miss_latency::total 400000
-system.cpu0.dcache.demand_miss_latency::cpu0.data 11286500
-system.cpu0.dcache.demand_miss_latency::total 11286500
-system.cpu0.dcache.overall_miss_latency::cpu0.data 11286500
-system.cpu0.dcache.overall_miss_latency::total 11286500
-system.cpu0.dcache.ReadReq_accesses::cpu0.data 48887
-system.cpu0.dcache.ReadReq_accesses::total 48887
-system.cpu0.dcache.WriteReq_accesses::cpu0.data 24908
-system.cpu0.dcache.WriteReq_accesses::total 24908
-system.cpu0.dcache.SwapReq_accesses::cpu0.data 42
-system.cpu0.dcache.SwapReq_accesses::total 42
-system.cpu0.dcache.demand_accesses::cpu0.data 73795
-system.cpu0.dcache.demand_accesses::total 73795
-system.cpu0.dcache.overall_accesses::cpu0.data 73795
-system.cpu0.dcache.overall_accesses::total 73795
-system.cpu0.dcache.ReadReq_miss_rate::cpu0.data 0.003477
-system.cpu0.dcache.ReadReq_miss_rate::total 0.003477
-system.cpu0.dcache.WriteReq_miss_rate::cpu0.data 0.007347
-system.cpu0.dcache.WriteReq_miss_rate::total 0.007347
-system.cpu0.dcache.SwapReq_miss_rate::cpu0.data 0.619048
-system.cpu0.dcache.SwapReq_miss_rate::total 0.619048
-system.cpu0.dcache.demand_miss_rate::cpu0.data 0.004784
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-system.membus.trans_dist::ReadSharedReq 430
-system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 1405
-system.membus.pkt_count::total 1405
-system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 36608
-system.membus.pkt_size::total 36608
-system.membus.snoops 261
-system.membus.snoopTraffic 0
-system.membus.snoop_fanout::samples 839
-system.membus.snoop_fanout::mean 0
-system.membus.snoop_fanout::stdev 0
-system.membus.snoop_fanout::underflows 0 0.00% 0.00%
-system.membus.snoop_fanout::0 839 100.00% 100.00%
-system.membus.snoop_fanout::1 0 0.00% 100.00%
-system.membus.snoop_fanout::overflows 0 0.00% 100.00%
-system.membus.snoop_fanout::min_value 0
-system.membus.snoop_fanout::max_value 0
-system.membus.snoop_fanout::total 839
-system.membus.reqLayer0.occupancy 587124
-system.membus.reqLayer0.utilization 0.2
-system.membus.respLayer1.occupancy 2860000
-system.membus.respLayer1.utilization 1.1
-system.toL2Bus.snoop_filter.tot_requests 3977
-system.toL2Bus.snoop_filter.hit_single_requests 1080
-system.toL2Bus.snoop_filter.hit_multi_requests 1895
-system.toL2Bus.snoop_filter.tot_snoops 0
-system.toL2Bus.snoop_filter.hit_single_snoops 0
-system.toL2Bus.snoop_filter.hit_multi_snoops 0
-system.toL2Bus.pwrStateResidencyTicks::UNDEFINED 263409500
-system.toL2Bus.trans_dist::ReadResp 2225
-system.toL2Bus.trans_dist::WritebackDirty 1
-system.toL2Bus.trans_dist::WritebackClean 1056
-system.toL2Bus.trans_dist::CleanEvict 1
-system.toL2Bus.trans_dist::UpgradeReq 274
-system.toL2Bus.trans_dist::UpgradeResp 274
-system.toL2Bus.trans_dist::ReadExReq 420
-system.toL2Bus.trans_dist::ReadExResp 420
-system.toL2Bus.trans_dist::ReadCleanReq 1566
-system.toL2Bus.trans_dist::ReadSharedReq 659
-system.toL2Bus.pkt_count_system.cpu0.icache.mem_side::system.l2c.cpu_side 1149
-system.toL2Bus.pkt_count_system.cpu0.dcache.mem_side::system.l2c.cpu_side 581
-system.toL2Bus.pkt_count_system.cpu1.icache.mem_side::system.l2c.cpu_side 1012
-system.toL2Bus.pkt_count_system.cpu1.dcache.mem_side::system.l2c.cpu_side 366
-system.toL2Bus.pkt_count_system.cpu2.icache.mem_side::system.l2c.cpu_side 1012
-system.toL2Bus.pkt_count_system.cpu2.dcache.mem_side::system.l2c.cpu_side 365
-system.toL2Bus.pkt_count_system.cpu3.icache.mem_side::system.l2c.cpu_side 1015
-system.toL2Bus.pkt_count_system.cpu3.dcache.mem_side::system.l2c.cpu_side 368
-system.toL2Bus.pkt_count::total 5868
-system.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.l2c.cpu_side 43648
-system.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.l2c.cpu_side 10944
-system.toL2Bus.pkt_size_system.cpu1.icache.mem_side::system.l2c.cpu_side 41344
-system.toL2Bus.pkt_size_system.cpu1.dcache.mem_side::system.l2c.cpu_side 1600
-system.toL2Bus.pkt_size_system.cpu2.icache.mem_side::system.l2c.cpu_side 41344
-system.toL2Bus.pkt_size_system.cpu2.dcache.mem_side::system.l2c.cpu_side 1664
-system.toL2Bus.pkt_size_system.cpu3.icache.mem_side::system.l2c.cpu_side 41472
-system.toL2Bus.pkt_size_system.cpu3.dcache.mem_side::system.l2c.cpu_side 1600
-system.toL2Bus.pkt_size::total 183616
-system.toL2Bus.snoops 1028
-system.toL2Bus.snoopTraffic 53312
-system.toL2Bus.snoop_fanout::samples 2919
-system.toL2Bus.snoop_fanout::mean 1.294964
-system.toL2Bus.snoop_fanout::stdev 1.172134
-system.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00%
-system.toL2Bus.snoop_fanout::0 1002 34.33% 34.33%
-system.toL2Bus.snoop_fanout::1 753 25.80% 60.12%
-system.toL2Bus.snoop_fanout::2 465 15.93% 76.05%
-system.toL2Bus.snoop_fanout::3 699 23.95% 100.00%
-system.toL2Bus.snoop_fanout::4 0 0.00% 100.00%
-system.toL2Bus.snoop_fanout::5 0 0.00% 100.00%
-system.toL2Bus.snoop_fanout::6 0 0.00% 100.00%
-system.toL2Bus.snoop_fanout::7 0 0.00% 100.00%
-system.toL2Bus.snoop_fanout::8 0 0.00% 100.00%
-system.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00%
-system.toL2Bus.snoop_fanout::min_value 0
-system.toL2Bus.snoop_fanout::max_value 3
-system.toL2Bus.snoop_fanout::total 2919
-system.toL2Bus.reqLayer0.occupancy 3053983
-system.toL2Bus.reqLayer0.utilization 1.2
-system.toL2Bus.respLayer0.occupancy 700500
-system.toL2Bus.respLayer0.utilization 0.3
-system.toL2Bus.respLayer1.occupancy 499498
-system.toL2Bus.respLayer1.utilization 0.2
-system.toL2Bus.respLayer2.occupancy 550995
-system.toL2Bus.respLayer2.utilization 0.2
-system.toL2Bus.respLayer3.occupancy 431976
-system.toL2Bus.respLayer3.utilization 0.2
-system.toL2Bus.respLayer4.occupancy 552491
-system.toL2Bus.respLayer4.utilization 0.2
-system.toL2Bus.respLayer5.occupancy 427974
-system.toL2Bus.respLayer5.utilization 0.2
-system.toL2Bus.respLayer6.occupancy 554986
-system.toL2Bus.respLayer6.utilization 0.2
-system.toL2Bus.respLayer7.occupancy 431477
-system.toL2Bus.respLayer7.utilization 0.2
-
----------- End Simulation Statistics ----------
+++ /dev/null
-process = Process(executable = binpath('m5threads', 'test_atomic'),
- cmd = ['test_atomic', str(nb_cores)])
-
-for i in range(nb_cores):
- root.system.cpu[i].workload = process
projects / gem5.git / commitdiff