arch-power: Add fixed-point logical bit permute instructions

This adds the following logical instructions:
  * Bit Permute Doubleword (bpermd[.])

Change-Id: I1af329cd28871c00ebb0574e38a53bcd6a3b794c
Signed-off-by: Sandipan Das <sandipan@linux.vnet.ibm.com>

diff --git a/src/arch/power/isa/decoder.isa b/src/arch/power/isa/decoder.isa
index f66bb71876ce7c476be285dfe0de50dc88ca623a..f98fe82fd08c330171bc83a4823ca757528015b3 100644 (file)
--- a/src/arch/power/isa/decoder.isa
+++ b/src/arch/power/isa/decoder.isa
@@ -576,6 +576,19 @@ decode PO default Unknown::unknown() {
                 Ra = res;
             }});
 
+            252: bpermd({{
+                uint64_t res = 0;
+                for (int i = 0; i < 8; ++i) {
+                    int index = (Rs >> (i * 8)) & 0xff;
+                    if (index < 64) {
+                        if (Rb & (1ULL << (63 - index))) {
+                            res |= 1 << i;
+                        }
+                    }
+                }
+                Ra = res;
+            }});
+
             24: slw({{
                 if (Rb & 0x20) {
                     Ra = 0;