radv: Don't set dynamic state for pipelines with rasterizer dicard.

All of the dynamic states apply to rasterization & fragment processing,
so we don't need to set them if we don't rasterize.

We don't clear the dirty flags for them though, so we don't miss any
updates for the next pipeline with rasterization.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes: 76603aa90b8 "radv: Drop the default viewport when 0 viewports are given."

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index d165512eb6bd1a5ba3c213b107470366c0b6ecac..edd7122125944523f53dadb28a4d4aadb49fa789 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1192,6 +1192,15 @@ radv_cmd_buffer_flush_dynamic_state(struct radv_cmd_buffer *cmd_buffer)
 {
        struct radv_dynamic_state *d = &cmd_buffer->state.dynamic;
 
+       if (G_028810_DX_RASTERIZATION_KILL(cmd_buffer->state.pipeline->graphics.raster.pa_cl_clip_cntl))
+               return;
+
+       if (cmd_buffer->state.dirty & (RADV_CMD_DIRTY_DYNAMIC_VIEWPORT))
+               radv_emit_viewport(cmd_buffer);
+
+       if (cmd_buffer->state.dirty & (RADV_CMD_DIRTY_DYNAMIC_SCISSOR | RADV_CMD_DIRTY_DYNAMIC_VIEWPORT))
+               radv_emit_scissor(cmd_buffer);
+
        if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_DYNAMIC_LINE_WIDTH) {
                unsigned width = cmd_buffer->state.dynamic.line_width * 8;
                radeon_set_context_reg(cmd_buffer->cs, R_028A08_PA_SU_LINE_CNTL,
@@ -1536,12 +1545,6 @@ radv_cmd_buffer_flush_state(struct radv_cmd_buffer *cmd_buffer,
        if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_RENDER_TARGETS)
                radv_emit_framebuffer_state(cmd_buffer);
 
-       if (cmd_buffer->state.dirty & (RADV_CMD_DIRTY_DYNAMIC_VIEWPORT))
-               radv_emit_viewport(cmd_buffer);
-
-       if (cmd_buffer->state.dirty & (RADV_CMD_DIRTY_DYNAMIC_SCISSOR | RADV_CMD_DIRTY_DYNAMIC_VIEWPORT))
-               radv_emit_scissor(cmd_buffer);
-
        ia_multi_vgt_param = si_get_ia_multi_vgt_param(cmd_buffer, instanced_draw, indirect_draw, draw_vertex_count);
        if (cmd_buffer->state.last_ia_multi_vgt_param != ia_multi_vgt_param) {
                if (cmd_buffer->device->physical_device->rad_info.chip_class >= CIK)