i965: Fix VB packet reuse when offset for the new buffer isn't stride aligned.
authorEric Anholt <eric@anholt.net>
Tue, 22 Feb 2011 00:24:41 +0000 (16:24 -0800)
committerEric Anholt <eric@anholt.net>
Tue, 22 Feb 2011 00:36:09 +0000 (16:36 -0800)
Fixes regression in scissor-stencil-clear and 5 other tests.

src/mesa/drivers/dri/i965/brw_draw_upload.c

index 17af046b50376808dfec25e5811ee6d7c5654af7..b15c05a7ad192c2c2ec9244a38ae076b1a518f7c 100644 (file)
@@ -470,7 +470,7 @@ static void brw_prepare_vertices(struct brw_context *brw)
         d = brw->vb.buffers[i].offset - brw->vb.current_buffers[i].offset;
         if (delta == 0)
            delta = d / brw->vb.current_buffers[i].stride;
-        else if (delta * brw->vb.current_buffers[i].stride != d)
+        if (delta * brw->vb.current_buffers[i].stride != d)
            break;
       }