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diff --git a/openpower/openpower/sv/predication.mdwn b/openpower/openpower/sv/predication.mdwn
index 5b026cf541875397102752e88427e9cc69ded55c..f548a902021a3085b43702066cd64af0d13cd7ee 100644 (file)
--- a/openpower/openpower/sv/predication.mdwn
+++ b/openpower/openpower/sv/predication.mdwn
@@ -1,5 +1,7 @@
 # TODO
 
+<https://bugs.libre-soc.org/show_bug.cgi?id=213>
+
 * idea 1: modify cmp (and other CR generators?) with qualifiers that create single bit prefix vector into int reg
 * idea 2: override CR SO field in vector form to be predicate bit per element
 * idea 3: reading of predicates is from bits of int reg