return
def create_system(options, full_system, system, dma_ports, ruby_system):
-
+
if buildEnv['PROTOCOL'] != 'MI_example':
panic("This script requires the MI_example protocol to be built.")
cpu_sequencers = []
-
+
#
# The ruby network creation expects the list of nodes in the system to be
# consistent with the NetDest list. Therefore the l1 controller nodes must be
#
dma_seq = DMASequencer(version = i,
ruby_system = ruby_system)
-
+
dma_cntrl = DMA_Controller(version = i,
dma_sequencer = dma_seq,
transitions_per_cycle = options.ports,
panic("This script requires the MOESI_CMP_directory protocol to be built.")
cpu_sequencers = []
-
+
#
# The ruby network creation expects the list of nodes in the system to be
# consistent with the NetDest list. Therefore the l1 controller nodes must be
L2cache = l2_cache,
transitions_per_cycle = options.ports,
ruby_system = ruby_system)
-
+
exec("ruby_system.l2_cntrl%d = l2_cntrl" % i)
l2_cntrl_nodes.append(l2_cntrl)
dma_seq = DMASequencer(version = i,
ruby_system = ruby_system,
slave = dma_port)
-
+
dma_cntrl = DMA_Controller(version = i,
dma_sequencer = dma_seq,
transitions_per_cycle = options.ports,
help="Token_CMP: disable dyanimc timeouts, use fixed latency instead")
parser.add_option("--allow-atomic-migration", action="store_true",
help="allow migratory sharing for atomic only accessed blocks")
-
+
def create_system(options, full_system, system, dma_ports, ruby_system):
-
+
if buildEnv['PROTOCOL'] != 'MOESI_CMP_token':
panic("This script requires the MOESI_CMP_token protocol to be built.")
n_tokens = options.num_cpus + 1
cpu_sequencers = []
-
+
#
# The ruby network creation expects the list of nodes in the system to be
# consistent with the NetDest list. Therefore the l1 controller nodes must be
#
l2_bits = int(math.log(options.num_l2caches, 2))
block_size_bits = int(math.log(options.cacheline_size, 2))
-
+
for i in xrange(options.num_cpus):
#
# First create the Ruby objects associated with this cpu
N_tokens = n_tokens,
transitions_per_cycle = options.ports,
ruby_system = ruby_system)
-
+
exec("ruby_system.l2_cntrl%d = l2_cntrl" % i)
l2_cntrl_nodes.append(l2_cntrl)
dma_seq = DMASequencer(version = i,
ruby_system = ruby_system,
slave = dma_port)
-
+
dma_cntrl = DMA_Controller(version = i,
dma_sequencer = dma_seq,
transitions_per_cycle = options.ports,
panic("This script requires the MOESI_hammer protocol to be built.")
cpu_sequencers = []
-
+
#
# The ruby network creation expects the list of nodes in the system to be
# consistent with the NetDest list. Therefore the l1 controller nodes must be
dma_seq = DMASequencer(version = i,
ruby_system = ruby_system,
slave = dma_port)
-
+
dma_cntrl = DMA_Controller(version = i,
dma_sequencer = dma_seq,
transitions_per_cycle = options.ports,
return
def create_system(options, full_system, system, dma_ports, ruby_system):
-
+
if buildEnv['PROTOCOL'] != 'Network_test':
panic("This script requires the Network_test protocol to be built.")
# The Garnet tester protocol does not support fs nor dma
#
assert(dma_ports == [])
-
+
#
# The ruby network creation expects the list of nodes in the system to be
# consistent with the NetDest list. Therefore the l1 controller nodes must be
Cycles m_time_last_time_size_checked;
unsigned int m_size_last_time_size_checked;
- // variables used so enqueues appear to happen imediately, while
+ // variables used so enqueues appear to happen immediately, while
// pop happen the next cycle
Cycles m_time_last_time_enqueue;
Tick m_time_last_time_pop;
typedef RubyNetworkParams Params;
Network(const Params *p);
const Params * params() const
- { return dynamic_cast<const Params *>(_params);}
+ { return dynamic_cast<const Params *>(_params); }
virtual ~Network();
virtual void init();
#include "mem/ruby/network/fault_model/FaultModel.hh"
#include "params/BaseGarnetNetwork.hh"
-class BaseGarnetNetwork : public Network
+class BaseGarnetNetwork : public Network
{
public:
typedef BaseGarnetNetworkParams Params;
BaseGarnetNetwork(const Params *p);
void init();
- int getNiFlitSize() {return m_ni_flit_size; }
- int getVCsPerVnet() {return m_vcs_per_vnet; }
- bool isFaultModelEnabled() {return m_enable_fault_model;}
+ int getNiFlitSize() { return m_ni_flit_size; }
+ int getVCsPerVnet() { return m_vcs_per_vnet; }
+ bool isFaultModelEnabled() { return m_enable_fault_model; }
FaultModel* fault_model;
void increment_injected_flits(int vnet) { m_flits_injected[vnet]++; }
~GarnetNetwork_d();
void init();
- int getBuffersPerDataVC() {return m_buffers_per_data_vc; }
- int getBuffersPerCtrlVC() {return m_buffers_per_ctrl_vc; }
+ int getBuffersPerDataVC() { return m_buffers_per_data_vc; }
+ int getBuffersPerCtrlVC() { return m_buffers_per_ctrl_vc; }
void collateStats();
void regStats();
}
// Methods used by Topology to setup the network
- void makeOutLink(SwitchID src, NodeID dest, BasicLink* link,
+ void makeOutLink(SwitchID src, NodeID dest, BasicLink* link,
LinkDirection direction,
const NetDest& routing_table_entry);
void makeInLink(NodeID src, SwitchID dest, BasicLink* link,
}
void
-GarnetNetwork::makeInLink(NodeID src, SwitchID dest, BasicLink* link,
- LinkDirection direction,
+GarnetNetwork::makeInLink(NodeID src, SwitchID dest, BasicLink* link,
+ LinkDirection direction,
const NetDest& routing_table_entry)
{
assert(src < m_nodes);
}
void
-GarnetNetwork::makeOutLink(SwitchID src, NodeID dest, BasicLink* link,
- LinkDirection direction,
+GarnetNetwork::makeOutLink(SwitchID src, NodeID dest, BasicLink* link,
+ LinkDirection direction,
const NetDest& routing_table_entry)
{
assert(dest < m_nodes);
void
GarnetNetwork::makeInternalLink(SwitchID src, SwitchID dest, BasicLink* link,
- LinkDirection direction,
+ LinkDirection direction,
const NetDest& routing_table_entry)
{
GarnetIntLink* garnet_link = safe_cast<GarnetIntLink*>(link);
// From a switch to an endpoint node
void
-SimpleNetwork::makeOutLink(SwitchID src, NodeID dest, BasicLink* link,
- LinkDirection direction,
+SimpleNetwork::makeOutLink(SwitchID src, NodeID dest, BasicLink* link,
+ LinkDirection direction,
const NetDest& routing_table_entry)
{
assert(dest < m_nodes);
// From an endpoint node to a switch
void
-SimpleNetwork::makeInLink(NodeID src, SwitchID dest, BasicLink* link,
- LinkDirection direction,
+SimpleNetwork::makeInLink(NodeID src, SwitchID dest, BasicLink* link,
+ LinkDirection direction,
const NetDest& routing_table_entry)
{
assert(src < m_nodes);
// From a switch to a switch
void
-SimpleNetwork::makeInternalLink(SwitchID src, SwitchID dest, BasicLink* link,
- LinkDirection direction,
+SimpleNetwork::makeInternalLink(SwitchID src, SwitchID dest, BasicLink* link,
+ LinkDirection direction,
const NetDest& routing_table_entry)
{
// Create a set of new MessageBuffers
unsigned int mapIndexToBank(int64 idx);
public:
- BankedArray(unsigned int banks, Cycles accessLatency, unsigned int startIndexBit);
+ BankedArray(unsigned int banks, Cycles accessLatency,
+ unsigned int startIndexBit);
// Note: We try the access based on the cache index, not the address
// This is so we don't get aliasing on blocks being replaced
assert(m_mandatory_q_ptr != NULL);
m_mandatory_q_ptr->enqueue(msg);
active_request.bytes_issued += msg->getLen();
- DPRINTF(RubyDma,
+ DPRINTF(RubyDma,
"DMA request bytes issued %d, bytes completed %d, total len %d\n",
active_request.bytes_issued, active_request.bytes_completed,
active_request.len);
if (!retryList.empty()) {
//
// Record the current list of ports to retry on a temporary list before
- // calling sendRetry on those ports. sendRetry will cause an
+ // calling sendRetry on those ports. sendRetry will cause an
// immediate retry, which may result in the ports being put back on the
// list. Therefore we want to clear the retryList before calling
// sendRetry.
{
bool needsResponse = pkt->needsResponse();
- // Unless specified at configuraiton, all responses except failed SC
+ // Unless specified at configuraiton, all responses except failed SC
// and Flush operations access M5 physical memory.
bool accessPhysMem = access_backing_store;
} else {
//
// For successful SC requests, indicate the success to the cpu by
- // setting the extra data to one.
+ // setting the extra data to one.
//
request->pkt->req->setExtraData(1);
}
void
RubySystem::registerNetwork(Network* network_ptr)
{
- m_network = network_ptr;
+ m_network = network_ptr;
}
void
RubySystem::registerAbstractController(AbstractController* cntrl)
{
- m_abs_cntrl_vec.push_back(cntrl);
+ m_abs_cntrl_vec.push_back(cntrl);
- MachineID id = cntrl->getMachineID();
- g_abs_controls[id.getType()][id.getNum()] = cntrl;
+ MachineID id = cntrl->getMachineID();
+ g_abs_controls[id.getType()][id.getNum()] = cntrl;
}
RubySystem::~RubySystem()
// Restore curTick
setCurTick(curtick_original);
- // Aggergate the trace entries together into a single array
+ // Aggregate the trace entries together into a single array
uint8_t *raw_data = new uint8_t[4096];
uint64 cache_trace_size = m_cache_recorder->aggregateRecords(&raw_data,
4096);
"in StateMachine.py", param.type_ast.type.c_ident)
code.dedent()
code.write(path, '%s.py' % py_ident)
-
+
def printControllerHH(self, path):
'''Output the method declarations for the class declaration'''
if re.compile("sequencer").search(param.ident):
code('m_${{param.ident}}_ptr->setController(this);')
-
+
for var in self.objects:
if var.ident.find("mandatoryQueue") >= 0:
code('''
</TR>
''')
code('''
-<!- Column footer->
+<!- Column footer->
<TR>
<TH> </TH>
''')
# For each field
for i,(ident,enum) in enumerate(self.enums.iteritems()):
desc = enum.get("desc", "No description avaliable")
- if i == 0:
- init = ' = %s_FIRST' % self.c_ident
+ if i == 0:
+ init = ' = %s_FIRST' % self.c_ident
else:
init = ''
code('${{self.c_ident}}_${{enum.ident}}$init, /**< $desc */')
projects / gem5.git / commitdiff