create compiler for general pseudo-code functions in v3.0B spec
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 16 May 2021 13:24:25 +0000 (14:24 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 16 May 2021 13:24:25 +0000 (14:24 +0100)
specifically to support FP such as convert from int etc

openpower/isafunctions/fpfromint.mdwn
src/openpower/decoder/power_pseudo.py
src/openpower/decoder/pseudo/parser.py

index df3ed6911697d947d44d1b6546e215d10831c084..533b388f6763e21c803a51ad756aed524be472af 100644 (file)
@@ -6,43 +6,41 @@ Convert From Integer instructions.
 <!-- Power ISA Book I Version 3.0B Section A.3 page 782 -->
 
     def Round_Float( tgt_precision, sign, exp, frac, round_mode ):
-       inc <- 0
-       if tgt_precision = "single-precision" then
-           lsb <- frac[23]
-           gbit <- frac[24]
-           rbit <- frac[25]
-           xbit <- frac[26:63] > 0
-        else # tgt_precision = "double-precision"
-            lsb  <= frac[52]
-            gbit <= frac[53]
-            rbit <= frac[54]
-            xbit <= frac[55:63] > 0
+        inc <- 0
+        if tgt_precision = 'single-precision' then
+            lsb  <- frac[23]
+            gbit <- frac[24]
+            rbit <- frac[25]
+            xbit <- frac[26:63] > 0
+        else # tgt_precision = 'double-precision'
+            lsb  <- frac[52]
+            gbit <- frac[53]
+            rbit <- frac[54]
+            xbit <- frac[55:63] > 0
 
         if round_mode  = 0b00  then           # Round to Nearest
-            if lsb = 1 and gbit = 1              then inc <- 1
-            if lsb = 0 and gbit = 1 and rbit = 1 then inc <- 1
-            if lsb = 0 and gbit = 1 and xbit = 1 then inc <- 1
-        end
+            if (lsb = 1) & (gbit = 1)              then inc <- 1
+            if (lsb = 0) & (gbit = 1) & (rbit = 1) then inc <- 1
+            if (lsb = 0) & (gbit = 1) & (xbit = 1) then inc <- 1
         if round_mode  = 0b10  then           # Round toward + Infinity
-            if sign = 0 and gbit = 1 then inc <-1
-            if sign = 0 and rbit = 1 then inc <-1
-            if sign = 0 and xbit = 1 then inc <-1
-        end
+            if (sign = 0) & (gbit = 1) then inc <-1
+            if (sign = 0) & (rbit = 1) then inc <-1
+            if (sign = 0) & (xbit = 1) then inc <-1
         if round_mode  = 0b11  then           # Round toward - Infinity
-            if sign = 1 and gbit = 1 then inc <-1
-            if sign = 1 and rbit = 1 then inc <-1
-            if sign = 1 and xbit = 1 then inc <-1
-        end
-        # increase fraction, record the top bit as a "carry out"
-        if tgt_precision = "single-precision" then
-            tmp = [0]*25
-            tmp[1:24] = frac[0:23]
+            if (sign = 1) & (gbit = 1) then inc <-1
+            if (sign = 1) & (rbit = 1) then inc <-1
+            if (sign = 1) & (xbit = 1) then inc <-1
+
+        # increase fraction, record the top bit as a 'carry out'
+        if tgt_precision = 'single-precision' then
+            tmp       <- [0]*25
+            tmp[1:24] <- frac[0:23]
             tmp[0:24] <- tmp[0:24] + inc
             carry_out = tmp[24]
             frac[0:23] = tmp[1:24]
-        else # tgt_precision = "double-precision"
-            tmp = [0]*54
-            tmp[1:53] = frac[0:52]
+        else # tgt_precision = 'double-precision'
+            tmp       <- [0]*54
+            tmp[1:53] <- frac[0:52]
             tmp[0:53] <- tmp[0:53] + inc
             carry_out = tmp[53]
             frac[0:52] = tmp[1:54]
@@ -53,17 +51,17 @@ Convert From Integer instructions.
         # FPSCR[XX] <- FPSCR[XX] | FPSCR[FI]
 
     def INT2FP(FR, cvt, RN):
-        if cvt = "sint2double" then
-            tgt_precision = "double-precision"
+        if cvt = 'sint2double' then
+            tgt_precision = 'double-precision'
             sign       <- FR[0]
-        if cvt = "sint2single" then
-            tgt_precision <- "single-precision"
+        if cvt = 'sint2single' then
+            tgt_precision <- 'single-precision'
             sign       <- FR[0]
-        if cvt = "uint2double" then
-            tgt_precision <- "double-precision"
+        if cvt = 'uint2double' then
+            tgt_precision <- 'double-precision'
             sign       <- 0
-        if cvt = "uint2single" then
-            tgt_precision <- "single-precision"
+        if cvt = 'uint2single' then
+            tgt_precision <- 'single-precision'
             sign       <- 0
 
         result = [0] * 64
@@ -75,7 +73,7 @@ Convert From Integer instructions.
             # TODO, FPSCR
             #FPSCR[FR] <- 0b00
             #FPSCR[FI] <- 0b00
-            #FPSCR[FPRF] <- "+ zero"
+            #FPSCR[FPRF] <- '+ zero'
             result = [0] * 64
         else
             if sign = 1 then frac[0:63] <- ¬frac[0:63] + 1
@@ -87,8 +85,8 @@ Convert From Integer instructions.
             # round to nearest
             Round_Float( tgt_precision, sign, exp, frac, 0b00 )
             # TODO, FPSCR
-            #if sign = 0 then FPSCR[FPRF] <- "+normal number"
-            #if sign = 1 then FPSCR[FPRF] <- "-normal number"
+            #if sign = 0 then FPSCR[FPRF] <- '+normal number'
+            #if sign = 1 then FPSCR[FPRF] <- '-normal number'
             result[0]    <- sign
             result[1:11] <- exp + 1023     # exp + bias
             result[12:63] <- frac[1:52]
index eb87b626e2162cd6b8f6ccd961658b27d6b7447d..9e4bc81ddb0bd780ac79d7ad338d702cf6ad6bfc 100644 (file)
@@ -212,6 +212,15 @@ def get_reg_hex(reg):
     return hex(reg.value)
 
 
+def convert_to_pure_python(pcode):
+
+    gsc = GardenSnakeCompiler(form=None, incl_carry=False)
+
+    tree = gsc.compile(pcode, mode="exec", filename="string")
+    tree = ast.fix_missing_locations(tree)
+    return astor.to_source(tree)
+
+
 def convert_to_python(pcode, form, incl_carry):
 
     print("form", form)
index f7d694f7a4bcf4043c3ca681bcad47302aa08688..3428d27c2f10ca6c3bd78988284015b108af8857 100644 (file)
@@ -271,9 +271,12 @@ class PowerParser:
     def __init__(self, form, include_carry_in_write=False):
         self.include_ca_in_write = include_carry_in_write
         self.gprs = {}
-        form = self.sd.sigforms[form]
-        print(form)
-        formkeys = form._asdict().keys()
+        if form is not None:
+            form = self.sd.sigforms[form]
+            print(form)
+            formkeys = form._asdict().keys()
+        else:
+            formkeys = []
         self.declared_vars = set()
         for rname in regs + fregs:
             self.gprs[rname] = None
@@ -341,7 +344,8 @@ class PowerParser:
         """varargslist : varargslist COMMA NAME
                        | NAME"""
         if len(p) == 4:
-            p[0] = p[1] + p[3]
+            print (p[1], p[3])
+            p[0] = p[1] + [p[3]]
         else:
             p[0] = [p[1]]
 
@@ -871,7 +875,8 @@ class PowerParser:
 
 class GardenSnakeParser(PowerParser):
     def __init__(self, lexer=None, debug=False, form=None, incl_carry=False):
-        self.sd = create_pdecode()
+        if form is not None:
+            self.sd = create_pdecode()
         PowerParser.__init__(self, form, incl_carry)
         self.debug = debug
         if lexer is None: