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add explanatory comment
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Tue, 9 Oct 2018 15:17:42 +0000
(16:17 +0100)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Tue, 9 Oct 2018 15:17:42 +0000
(16:17 +0100)
riscv/insn_template_sv.cc
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diff --git
a/riscv/insn_template_sv.cc
b/riscv/insn_template_sv.cc
index 27634e14087afbb18eb3bfabb3db123818041aac..f96f117206ac225ebe2cffc936477b54453b02ea 100644
(file)
--- a/
riscv/insn_template_sv.cc
+++ b/
riscv/insn_template_sv.cc
@@
-50,7
+50,8
@@
the state machine *also* copes with cases where registers are marked
*specifically* as "redirected but still scalar", and the twin-predication
version can also skip forward so that a scalar can be matched up with
- a single bit-predicated vector.
+ a single bit-predicated vector (scalar source, single-bit-predicated
+ dest *or* the other way round).
it's *really* comprehensive in other words, for just 200 or so lines.
*/