radv: Work around non-renderable 128bpp compressed 3d textures on GFX9.

Exactly what title says, the new addrlib does not allow the above with
certain dimensions that the CTS seems to hit. Work around it by not
allowing the app to render to it via compat with  other 128bpp formats
and do not render to it ourselves during copies.

Fixes: 776b9113656 "amd/addrlib: update Mesa's copy of addrlib"
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c
index aeba5e161c9de99effdd179de7087c91b8602b60..91004e032a392435d4ebefc79ae6242289ebf8b3 100644 (file)
--- a/src/amd/common/ac_surface.c
+++ b/src/amd/common/ac_surface.c
@@ -1412,11 +1412,13 @@ static int gfx9_compute_surface(ADDR_HANDLE addrlib,
                AddrSurfInfoIn.bpp = surf->bpe * 8;
        }
 
-       AddrSurfInfoIn.flags.color = !(surf->flags & RADEON_SURF_Z_OR_SBUFFER);
+       bool is_color_surface = !(surf->flags & RADEON_SURF_Z_OR_SBUFFER);
+       AddrSurfInfoIn.flags.color = is_color_surface &&
+                                    !(surf->flags & RADEON_SURF_NO_RENDER_TARGET);
        AddrSurfInfoIn.flags.depth = (surf->flags & RADEON_SURF_ZBUFFER) != 0;
        AddrSurfInfoIn.flags.display = get_display_flag(config, surf);
        /* flags.texture currently refers to TC-compatible HTILE */
-       AddrSurfInfoIn.flags.texture = AddrSurfInfoIn.flags.color ||
+       AddrSurfInfoIn.flags.texture = is_color_surface ||
                                       surf->flags & RADEON_SURF_TC_COMPATIBLE_HTILE;
        AddrSurfInfoIn.flags.opt4space = 1;
 

diff --git a/src/amd/common/ac_surface.h b/src/amd/common/ac_surface.h
index 8ba964e64ec2543ebd05c2fd68a7bba4c4a0ba68..7ae166c70a3bb9095654a808d024fa4a9260246a 100644 (file)
--- a/src/amd/common/ac_surface.h
+++ b/src/amd/common/ac_surface.h
@@ -68,6 +68,7 @@ enum radeon_micro_mode {
 #define RADEON_SURF_IMPORTED                    (1 << 24)
 #define RADEON_SURF_OPTIMIZE_FOR_SPACE          (1 << 25)
 #define RADEON_SURF_SHAREABLE                   (1 << 26)
+#define RADEON_SURF_NO_RENDER_TARGET            (1 << 27)
 
 struct legacy_surf_level {
     uint64_t                    offset;

diff --git a/src/amd/vulkan/radv_formats.c b/src/amd/vulkan/radv_formats.c
index 59bc46d2fc8983651a99ba025642bf7a83196dba..843279805080b1e3b83890a31710378dd184b66a 100644 (file)
--- a/src/amd/vulkan/radv_formats.c
+++ b/src/amd/vulkan/radv_formats.c
@@ -1112,6 +1112,18 @@ static VkResult radv_get_image_format_properties(struct radv_physical_device *ph
                maxMipLevels = 1;
        }
 
+
+       /* We can't create 3d compressed 128bpp images that can be rendered to on GFX9 */
+       if (physical_device->rad_info.chip_class >= GFX9 &&
+           info->type == VK_IMAGE_TYPE_3D &&
+           vk_format_get_blocksizebits(info->format) == 128 &&
+           vk_format_is_compressed(info->format) &&
+           (info->flags & VK_IMAGE_CREATE_BLOCK_TEXEL_VIEW_COMPATIBLE_BIT) &&
+           ((info->flags & VK_IMAGE_CREATE_EXTENDED_USAGE_BIT) ||
+            (info->usage & VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT))) {
+               goto unsupported;
+       }
+
        if (info->usage & VK_IMAGE_USAGE_SAMPLED_BIT) {
                if (!(format_feature_flags & VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT)) {
                        goto unsupported;

diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 2bd74e202fe1c6c16ef2c6bf9c2e952dcf11be6d..69bbcdcf645fb3112d7d4fee5aeb82c1586ad614 100644 (file)
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -249,6 +249,12 @@ radv_init_surface(struct radv_device *device,
        if (is_stencil)
                surface->flags |= RADEON_SURF_SBUFFER;
 
+       if (device->physical_device->rad_info.chip_class >= GFX9 &&
+           pCreateInfo->imageType == VK_IMAGE_TYPE_3D &&
+           vk_format_get_blocksizebits(pCreateInfo->format) == 128 &&
+           vk_format_is_compressed(pCreateInfo->format))
+               surface->flags |= RADEON_SURF_NO_RENDER_TARGET;
+
        surface->flags |= RADEON_SURF_OPTIMIZE_FOR_SPACE;
 
        if (!radv_use_dcc_for_image(device, image, create_info, pCreateInfo))

diff --git a/src/amd/vulkan/radv_meta_copy.c b/src/amd/vulkan/radv_meta_copy.c
index ddfb5c54673c8cdc08f4ae2d6fcd814b6c2e40c6..647a167ab4c78d9a73527f937f538aaff5a93700 100644 (file)
--- a/src/amd/vulkan/radv_meta_copy.c
+++ b/src/amd/vulkan/radv_meta_copy.c
@@ -107,6 +107,22 @@ blit_surf_for_image_level_layer(struct radv_image *image,
        };
 }
 
+static bool
+image_is_renderable(struct radv_device *device, struct radv_image *image)
+{
+       if (image->vk_format == VK_FORMAT_R32G32B32_UINT ||
+           image->vk_format == VK_FORMAT_R32G32B32_SINT ||
+           image->vk_format == VK_FORMAT_R32G32B32_SFLOAT)
+               return false;
+
+       if (device->physical_device->rad_info.chip_class >= GFX9 &&
+           image->type == VK_IMAGE_TYPE_3D &&
+           vk_format_get_blocksizebits(image->vk_format == 128) &&
+           vk_format_is_compressed(image->vk_format))
+               return false;
+       return true;
+}
+
 static void
 meta_copy_buffer_to_image(struct radv_cmd_buffer *cmd_buffer,
                           struct radv_buffer* buffer,
@@ -196,9 +212,7 @@ meta_copy_buffer_to_image(struct radv_cmd_buffer *cmd_buffer,
 
                        /* Perform Blit */
                        if (cs ||
-                           (img_bsurf.image->vk_format == VK_FORMAT_R32G32B32_UINT ||
-                            img_bsurf.image->vk_format == VK_FORMAT_R32G32B32_SINT ||
-                            img_bsurf.image->vk_format == VK_FORMAT_R32G32B32_SFLOAT)) {
+                           !image_is_renderable(cmd_buffer->device, img_bsurf.image)) {
                                radv_meta_buffer_to_image_cs(cmd_buffer, &buf_bsurf, &img_bsurf, 1, &rect);
                        } else {
                                radv_meta_blit2d(cmd_buffer, NULL, &buf_bsurf, &img_bsurf, 1, &rect);
@@ -483,9 +497,7 @@ meta_copy_image(struct radv_cmd_buffer *cmd_buffer,
 
                        /* Perform Blit */
                        if (cs ||
-                           (b_src.format == VK_FORMAT_R32G32B32_UINT ||
-                            b_src.format == VK_FORMAT_R32G32B32_SINT ||
-                            b_src.format == VK_FORMAT_R32G32B32_SFLOAT)) {
+                           !image_is_renderable(cmd_buffer->device, b_dst.image)) {
                                radv_meta_image_to_image_cs(cmd_buffer, &b_src, &b_dst, 1, &rect);
                        } else {
                                radv_meta_blit2d(cmd_buffer, &b_src, NULL, &b_dst, 1, &rect);