+2017-11-09 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * config/arm/arm.c (output_return_instruction): Add comments to
+ indicate requirement for cmse_nonsecure_entry return to account
+ for the size of clearing instruction output here.
+ (thumb_exit): Likewise.
+ * config/arm/thumb2.md (thumb2_cmse_entry_return): Fix length for
+ return in hardfloat mode.
+
2017-11-09 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.c (machine_function): Add a bool,
/* Generate a function exit sequence. If REALLY_RETURN is false, then do
everything bar the final return instruction. If simple_return is true,
- then do not output epilogue, because it has already been emitted in RTL. */
+ then do not output epilogue, because it has already been emitted in RTL.
+
+ Note: do not forget to update length attribute of corresponding insn pattern
+ when changing assembly output (eg. length attribute of
+ thumb2_cmse_entry_return when updating Armv8-M Mainline Security Extensions
+ register clearing sequences). */
const char *
output_return_instruction (rtx operand, bool really_return, bool reverse,
bool simple_return)
/* Generate code to return from a thumb function.
If 'reg_containing_return_addr' is -1, then the return address is
- actually on the stack, at the stack pointer. */
+ actually on the stack, at the stack pointer.
+
+ Note: do not forget to update length attribute of corresponding insn pattern
+ when changing assembly output (eg. length attribute of epilogue_insns when
+ updating Armv8-M Baseline Security Extensions register clearing
+ sequences). */
static void
thumb_exit (FILE *f, int reg_containing_return_addr)
{
; we adapt the length accordingly.
(set (attr "length")
(if_then_else (match_test "TARGET_HARD_FLOAT")
- (const_int 12)
+ (const_int 34)
(const_int 8)))
; We do not support predicate execution of returns from cmse_nonsecure_entry
; functions because we need to clear the APSR. Since predicable has to be