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rs6000.md (strlensi): Don't use subsi3 with a constant, use addsi3 directly.
authorSegher Boessenkool <segher@kernel.crashing.org>
Sun, 21 Sep 2014 18:01:59 +0000 (20:01 +0200)
committerSegher Boessenkool <segher@gcc.gnu.org>
Sun, 21 Sep 2014 18:01:59 +0000 (20:01 +0200)
2014-09-21  Segher Boessenkool  <segher@kernel.crashing.org>

* config/rs6000/rs6000.md (strlensi): Don't use subsi3 with a
constant, use addsi3 directly.
(three anonymous define_insn, two define_split): Delete.
(sub<mode>3): Move.  Do not allow constant second operand.
Generate different insn for constant first operand.
(*subf<mode>3, *subf<mode>3_dot, *subf<mode>3_dot2): New.
(subf<mode>3_imm): New.
(ctz<mode>2, ffs<mode>2): Clobber CA_REGNO where required.
(*plus_ltu<mode>): Only handle registers.
(*plus_ltu<mode>_1): New.  Handle integer third operand.
(*plus_gtu<mode>): Only handle registers.
(*plus_gtu<mode>_1): New.  Handle integer third operand.

From-SVN: r215434

gcc/ChangeLog patch | blob | history
gcc/config/rs6000/rs6000.md patch | blob | history

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index af1ebbc64a0d968b531f9a3166b84118d0fbef16..08e66b7ee5ff013efbca785c60874a76a32cb957 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,18 @@
+2014-09-21  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       * config/rs6000/rs6000.md (strlensi): Don't use subsi3 with a
+       constant, use addsi3 directly.
+       (three anonymous define_insn, two define_split): Delete.
+       (sub<mode>3): Move.  Do not allow constant second operand.
+       Generate different insn for constant first operand.
+       (*subf<mode>3, *subf<mode>3_dot, *subf<mode>3_dot2): New.
+       (subf<mode>3_imm): New.
+       (ctz<mode>2, ffs<mode>2): Clobber CA_REGNO where required.
+       (*plus_ltu<mode>): Only handle registers.
+       (*plus_ltu<mode>_1): New.  Handle integer third operand.
+       (*plus_gtu<mode>): Only handle registers.
+       (*plus_gtu<mode>_1): New.  Handle integer third operand.
+
 2014-09-21  Segher Boessenkool  <segher@kernel.crashing.org>
 
        * config/rs6000/rs6000.md (iorxor): New code_iterator.
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index b2f5c55534fa8b8d18ddd276876c8b055a8a419d..dfebf5ab87c16f1ce23c8635132a5f604b0a6a4b 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -1427,7 +1427,7 @@
   emit_label (end_label);
   emit_insn (gen_addsi3 (scratch_string, scratch_string, scratch_dlmzb));
   emit_insn (gen_subsi3 (result, scratch_string, addr));
-  emit_insn (gen_subsi3 (result, result, const1_rtx));
+  emit_insn (gen_addsi3 (result, result, constm1_rtx));
   DONE;
 })
 \f
@@ -1644,92 +1644,82 @@
    (set_attr "length" "4,8")])
 
 
-(define_insn ""
-  [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r")
-       (minus:GPR (match_operand:GPR 1 "reg_or_short_operand" "r,I")
-                  (match_operand:GPR 2 "gpc_reg_operand" "r,r")))]
+(define_expand "sub<mode>3"
+  [(set (match_operand:SDI 0 "gpc_reg_operand" "")
+       (minus:SDI (match_operand:SDI 1 "reg_or_short_operand" "")
+                  (match_operand:SDI 2 "gpc_reg_operand" "")))]
   ""
-  "@
-   subf %0,%2,%1
-   subfic %0,%2,%1"
+{
+  if (short_cint_operand (operands[1], <MODE>mode)
+      && !(<MODE>mode == DImode && !TARGET_POWERPC64))
+    {
+      emit_insn (gen_subf<mode>3_imm (operands[0], operands[2], operands[1]));
+      DONE;
+    }
+})
+
+(define_insn "*subf<mode>3"
+  [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
+       (minus:GPR (match_operand:GPR 2 "gpc_reg_operand" "r")
+                  (match_operand:GPR 1 "gpc_reg_operand" "r")))]
+  ""
+  "subf %0,%1,%2"
   [(set_attr "type" "add")])
 
-(define_insn ""
-  [(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
-       (compare:CC (minus:P (match_operand:P 1 "gpc_reg_operand" "r,r")
-                            (match_operand:P 2 "gpc_reg_operand" "r,r"))
+(define_insn_and_split "*subf<mode>3_dot"
+  [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
+       (compare:CC (minus:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r")
+                              (match_operand:GPR 1 "gpc_reg_operand" "r,r"))
                    (const_int 0)))
-   (clobber (match_scratch:P 3 "=r,r"))]
-  ""
+   (clobber (match_scratch:GPR 0 "=r,r"))]
+  "<MODE>mode == Pmode"
   "@
-   subf. %3,%2,%1
+   subf. %0,%1,%2
    #"
+  "&& reload_completed && cc_reg_not_cr0_operand (operands[3], CCmode)"
+  [(set (match_dup 0)
+       (minus:GPR (match_dup 2)
+                  (match_dup 1)))
+   (set (match_dup 3)
+       (compare:CC (match_dup 0)
+                   (const_int 0)))]
+  ""
   [(set_attr "type" "add")
    (set_attr "dot" "yes")
    (set_attr "length" "4,8")])
 
-(define_split
-  [(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
-       (compare:CC (minus:P (match_operand:P 1 "gpc_reg_operand" "")
-                            (match_operand:P 2 "gpc_reg_operand" ""))
-                   (const_int 0)))
-   (clobber (match_scratch:P 3 ""))]
-  "reload_completed"
-  [(set (match_dup 3)
-       (minus:P (match_dup 1)
-                 (match_dup 2)))
-   (set (match_dup 0)
-       (compare:CC (match_dup 3)
-                   (const_int 0)))]
-  "")
-
-(define_insn ""
+(define_insn_and_split "*subf<mode>3_dot2"
   [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
-       (compare:CC (minus:P (match_operand:P 1 "gpc_reg_operand" "r,r")
-                            (match_operand:P 2 "gpc_reg_operand" "r,r"))
+       (compare:CC (minus:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r")
+                              (match_operand:GPR 1 "gpc_reg_operand" "r,r"))
                    (const_int 0)))
-   (set (match_operand:P 0 "gpc_reg_operand" "=r,r")
-       (minus:P (match_dup 1)
-                 (match_dup 2)))]
-  ""
+   (set (match_operand:GPR 0 "gpc_reg_operand" "=r,r")
+       (minus:GPR (match_dup 2)
+                  (match_dup 1)))]
+  "<MODE>mode == Pmode"
   "@
-   subf. %0,%2,%1
+   subf. %0,%1,%2
    #"
-  [(set_attr "type" "add")
-   (set_attr "dot" "yes")
-   (set_attr "length" "4,8")])
-
-(define_split
-  [(set (match_operand:CC 3 "cc_reg_not_cr0_operand" "")
-       (compare:CC (minus:P (match_operand:P 1 "gpc_reg_operand" "")
-                            (match_operand:P 2 "gpc_reg_operand" ""))
-                   (const_int 0)))
-   (set (match_operand:P 0 "gpc_reg_operand" "")
-       (minus:P (match_dup 1)
-                 (match_dup 2)))]
-  "reload_completed"
+  "&& reload_completed && cc_reg_not_cr0_operand (operands[3], CCmode)"
   [(set (match_dup 0)
-       (minus:P (match_dup 1)
-                 (match_dup 2)))
+       (minus:GPR (match_dup 2)
+                  (match_dup 1)))
    (set (match_dup 3)
        (compare:CC (match_dup 0)
                    (const_int 0)))]
-  "")
+  ""
+  [(set_attr "type" "add")
+   (set_attr "dot" "yes")
+   (set_attr "length" "4,8")])
 
-(define_expand "sub<mode>3"
-  [(set (match_operand:SDI 0 "gpc_reg_operand" "")
-       (minus:SDI (match_operand:SDI 1 "reg_or_short_operand" "")
-                  (match_operand:SDI 2 "reg_or_sub_cint_operand" "")))]
+(define_insn "subf<mode>3_imm"
+  [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
+       (minus:GPR (match_operand:GPR 2 "short_cint_operand" "I")
+                  (match_operand:GPR 1 "gpc_reg_operand" "r")))
+   (clobber (reg:GPR CA_REGNO))]
   ""
-  "
-{
-  if (GET_CODE (operands[2]) == CONST_INT)
-    {
-      emit_insn (gen_add<mode>3 (operands[0], operands[1],
-                                negate_rtx (<MODE>mode, operands[2])));
-      DONE;
-    }
-}")
+  "subfic %0,%1,%2"
+  [(set_attr "type" "add")])
 
 
 (define_expand "neg<mode>2"
@@ -1802,9 +1792,10 @@
                 (match_dup 2)))
    (set (match_dup 4)
        (clz:GPR (match_dup 3)))
-   (set (match_operand:GPR 0 "gpc_reg_operand" "")
-       (minus:GPR (match_dup 5)
-                  (match_dup 4)))]
+   (parallel [(set (match_operand:GPR 0 "gpc_reg_operand" "")
+                  (minus:GPR (match_dup 5)
+                             (match_dup 4)))
+             (clobber (reg:GPR CA_REGNO))])]
   ""
   {
      operands[2] = gen_reg_rtx (<MODE>mode);
@@ -1821,9 +1812,10 @@
                 (match_dup 2)))
    (set (match_dup 4)
        (clz:GPR (match_dup 3)))
-   (set (match_operand:GPR 0 "gpc_reg_operand" "")
-       (minus:GPR (match_dup 5)
-                  (match_dup 4)))]
+   (parallel [(set (match_operand:GPR 0 "gpc_reg_operand" "")
+                  (minus:GPR (match_dup 5)
+                             (match_dup 4)))
+             (clobber (reg:GPR CA_REGNO))])]
   ""
   {
      operands[2] = gen_reg_rtx (<MODE>mode);
@@ -12582,7 +12574,7 @@
   [(set (match_operand:P 0 "gpc_reg_operand" "=&r,r")
        (plus:P (ltu:P (match_operand:P 1 "gpc_reg_operand" "r,r")
                       (match_operand:P 2 "reg_or_neg_short_operand" "r,P"))
-               (match_operand:P 3 "reg_or_short_operand" "rI,rI")))]
+               (match_operand:P 3 "gpc_reg_operand" "r,r")))]
   ""
   "#"
   "&& !reg_overlap_mentioned_p (operands[0], operands[3])"
@@ -12590,6 +12582,19 @@
    (set (match_dup 0) (minus:P (match_dup 3) (match_dup 0)))]
   "")
 
+(define_insn_and_split "*plus_ltu<mode>_1"
+  [(set (match_operand:P 0 "gpc_reg_operand" "=&r,r")
+       (plus:P (ltu:P (match_operand:P 1 "gpc_reg_operand" "r,r")
+                      (match_operand:P 2 "reg_or_neg_short_operand" "r,P"))
+               (match_operand:P 3 "short_cint_operand" "I,I")))]
+  ""
+  "#"
+  "&& !reg_overlap_mentioned_p (operands[0], operands[3])"
+  [(set (match_dup 0) (neg:P (ltu:P (match_dup 1) (match_dup 2))))
+   (parallel [(set (match_dup 0) (minus:P (match_dup 3) (match_dup 0)))
+             (clobber (reg:P CA_REGNO))])]
+  "")
+
 (define_insn_and_split "*plus_ltu<mode>_compare"
   [(set (match_operand:CC 4 "cc_reg_operand" "=x,x,?y,?y")
        (compare:CC
@@ -13014,7 +13019,7 @@
   [(set (match_operand:P 0 "gpc_reg_operand" "=&r")
         (plus:P (gtu:P (match_operand:P 1 "gpc_reg_operand" "r")
                       (match_operand:P 2 "reg_or_short_operand" "rI"))
-               (match_operand:P 3 "reg_or_short_operand" "rI")))]
+               (match_operand:P 3 "gpc_reg_operand" "r")))]
   ""
   "#"
   "&& !reg_overlap_mentioned_p (operands[0], operands[3])"
@@ -13022,6 +13027,19 @@
    (set (match_dup 0) (minus:P (match_dup 3) (match_dup 0)))]
   "")
 
+(define_insn_and_split "*plus_gtu<mode>_1"
+  [(set (match_operand:P 0 "gpc_reg_operand" "=&r")
+        (plus:P (gtu:P (match_operand:P 1 "gpc_reg_operand" "r")
+                      (match_operand:P 2 "reg_or_short_operand" "rI"))
+               (match_operand:P 3 "short_cint_operand" "I")))]
+  ""
+  "#"
+  "&& !reg_overlap_mentioned_p (operands[0], operands[3])"
+  [(set (match_dup 0) (neg:P (gtu:P (match_dup 1) (match_dup 2))))
+   (parallel [(set (match_dup 0) (minus:P (match_dup 3) (match_dup 0)))
+             (clobber (reg:P CA_REGNO))])]
+  "")
+
 (define_insn_and_split "*plus_gtu<mode>_compare"
   [(set (match_operand:CC 4 "cc_reg_operand" "=x,x,?y,?y")
        (compare:CC