sync_up: Formatting fixes

diff --git a/meetings/sync_up/sync_up_2024-01-16.mdwn b/meetings/sync_up/sync_up_2024-01-16.mdwn
index c5c9d346993bed18036de5959911f5f82253f831..9067626c83589a420989251460cf923a5ce7f30d 100644 (file)
--- a/meetings/sync_up/sync_up_2024-01-16.mdwn
+++ b/meetings/sync_up/sync_up_2024-01-16.mdwn
@@ -64,24 +64,39 @@ Meeting notes:
 Jacob provided great help:
 
 ```
-maddedu would be useful if you have a packed 130 bit number in words where the non-msb words have 64-bits per word, the code you had last i checked instead has 44-bits per register used 
-this is the pattern used by the x + y remap mode...which isn't working yet, so svindex is suitable for now 
+maddedu would be useful if you have a packed 130 bit number
+in words where the non-msb words have 64-bits per word, the
+code you had last i checked instead has 44-bits per register used
+
+this is the pattern used by the x + y remap mode...which
+isn't working yet, so svindex is suitable for now
+
 maddedu also has carry-out, which you don't have here 
 so maddld is sufficient 
 yes 
 or the x + y remap once that's implemented 
 setup shapes with svindex insn 
-no, those are offset by the register specified in the sv. insn that remap is applied to 
+no, those are offset by the register specified in the sv. insn
+that remap is applied to
+
 svindex has element numbers, not x,y,z 
 x,y,z are used for other remap modes 
 yes, use the svindex insn 
 you specify the vector to load element numbers from in the svindex insn
-but they're accessed with element-sized chunks with element size determined by svindex 
+but they're accessed with element-sized chunks with element size
+determined by svindex
+
 svindex is if you want only one sv.maddld insn that loops 9 times 
 lemme move to my desktop so i can type easier... 
-ok, so you'll want a mod-3 matrix remap in one SVSHAPE register, and svindex remap in another SVSHAPE register 
-so run svshape to set the matrix remap, then run svindex to overwrite one remap... 
-svshape writes all 4 SVSHAPE registers, svindex can set the SVSHAPE register you specify 
+ok, so you'll want a mod-3 matrix remap in one SVSHAPE register,
+and svindex remap in another SVSHAPE register
+
+so run svshape to set the matrix remap, then run svindex
+to overwrite one remap...
+
+svshape writes all 4 SVSHAPE registers, svindex can set the SVSHAPE
+register you specify
+
 (or all 4, but you don't want that mode) 
 so test_1_sv_index is an example of what you want... 
 it sets SVSHAPE2 
@@ -91,13 +106,21 @@ see comments immediately above
 see line 396 of simplev.mdwn for how rmm is used 
 in openpower-isa.git 
 * **SVG** - GPR SVG<<2 to be used for Indexing 
-so if you want the indexes to be in r4,r5,r6... set SVG to 1 which comes out to r4 (1 << 2) 
+so if you want the indexes to be in r4,r5,r6... set SVG to 1 which
+comes out to r4 (1 << 2)
+
 yes, a value of zero means use element 0 
-so, if you want remap to use elements 1,2,3,4,5,6,7,8 set the first register to 0x0807060504030201 and use byte elwid 
+so, if you want remap to use elements 1,2,3,4,5,6,7,8 set the first
+register to 0x0807060504030201 and use byte elwid 
 the svindex elwid, not the sv.insn elwid, they're independent 
-svremap tells the following sv.insn which SVSHAPE[0-3] register to use for each operand 
-you don't want to set the SVSHAPE register directly, instead put the indexes in GPRs and svindex insn sets SVSHAPE to point to those GPRs 
-ok, so if your indexes are in r4,r5 with byte elements, afaict you want svindex 1, 1, 9, 3, 0, 1, 0 which sets byte mode, sets SVSHAPE1 
+svremap tells the following sv.insn which SVSHAPE[0-3]
+register to use for each operand
+
+you don't want to set the SVSHAPE register directly, instead put the
+indexes in GPRs and svindex insn sets SVSHAPE to point to those GPRs
+
+ok, so if your indexes are in r4,r5 with byte elements, afaict you
+want svindex 1, 1, 9, 3, 0, 1, 0 which sets byte mode, sets SVSHAPE1 
 ```