Consistent with xilinx

diff --git a/techlibs/ice40/abc_hx.box b/techlibs/ice40/abc_hx.box
index 994f3091da2453ac522c8f83d03994c857e60563..9ebdae18bf90302b0b2795c3bbee7f4c6b0336da 100644 (file)
--- a/techlibs/ice40/abc_hx.box
+++ b/techlibs/ice40/abc_hx.box
@@ -4,7 +4,7 @@
 
 # Inputs: C D
 # Outputs: Q
-SB_DFF 1 1 2 1
+SB_DFF 1 0 2 1
 - -
 
 # Inputs: C D E

diff --git a/techlibs/ice40/cells_sim.v b/techlibs/ice40/cells_sim.v
index b5e10fb2056593d0cb723b03e3b7c3762b795ebe..6897aeeb4ce670ae1ef48126b55e0a41a5f8cafb 100644 (file)
--- a/techlibs/ice40/cells_sim.v
+++ b/techlibs/ice40/cells_sim.v
@@ -145,7 +145,7 @@ endmodule
 
 (* abc_box_id = 1, abc_flop, lib_whitebox *)
 module SB_DFF ((* abc_flop_q *) output `SB_DFF_REG, input C, (* abc_flop_d *) input D);
-`ifndef ABC_MODEL
+`ifndef _ABC
        always @(posedge C)
                Q <= D;
 `else

diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc
index 168161a90c029b03948a12f57b2ba46a88807b55..5afa042b01d322720ae1c67fc75c98e83a988f18 100644 (file)
--- a/techlibs/ice40/synth_ice40.cc
+++ b/techlibs/ice40/synth_ice40.cc
@@ -240,7 +240,7 @@ struct SynthIce40Pass : public ScriptPass
        {
                if (check_label("begin"))
                {
-                       run("read_verilog -lib -D ABC_MODEL +/ice40/cells_sim.v");
+                       run("read_verilog -lib -D_ABC +/ice40/cells_sim.v");
                        run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
                        run("proc");
                }
@@ -334,7 +334,7 @@ struct SynthIce40Pass : public ScriptPass
                                if (abc == "abc9")
                                        run(abc + stringf(" -dress -lut +/ice40/abc_%s.lut -box +/ice40/abc_%s.box", device_opt.c_str(), device_opt.c_str()), "(skip if -noabc)");
                                else
-                                       run(abc + " -lut 4", "(skip if -noabc)");
+                                       run(abc + " -dress -lut 4", "(skip if -noabc)");
                        }
                        run("clean");
                        if (relut || help_mode) {