Fixed handling of different signedness in power operands

diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc
index 9fa7f558bae2f649c4ce42b6b36a67a69b7b6535..fdb6e9eddd0c2825467c710db00744284dfa9608 100644 (file)
--- a/frontends/ast/simplify.cc
+++ b/frontends/ast/simplify.cc
@@ -1020,7 +1020,7 @@ skip_dynamic_range_lvalue_expansion:;
                if (0) { case AST_POW:          const_func = RTLIL::const_pow; }
                        if (children[0]->type == AST_CONSTANT && children[1]->type == AST_CONSTANT) {
                                RTLIL::Const y = const_func(children[0]->bitsAsConst(width_hint, sign_hint),
-                                               RTLIL::Const(children[1]->bits), sign_hint, type == AST_POW ? sign_hint : false, width_hint);
+                                               RTLIL::Const(children[1]->bits), sign_hint, type == AST_POW ? children[1]->is_signed : false, width_hint);
                                newNode = mkconst_bits(y.bits, sign_hint);
                        }
                        break;