"-z separate-code" generates different PLT addresses. Update these tests
to accept any PLT addresses.
* testsuite/ld-ifunc/ifunc-1-local-x86.d: Updated.
* testsuite/ld-ifunc/ifunc-1-x86.d: Likewise.
* testsuite/ld-ifunc/ifunc-3a-x86.d: Likewise.
+2018-02-16 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/ld-ifunc/ifunc-1-local-x86.d: Updated.
+ * testsuite/ld-ifunc/ifunc-1-x86.d: Likewise.
+ * testsuite/ld-ifunc/ifunc-3a-x86.d: Likewise.
+
2018-02-16 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/ld-i386/ibt-plt-1.d: Add -z noseparate-code.
#map: ifunc-1-local-x86.map
#...
-[ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*(\+0x160|\+0x170|\+0x1e0|)@plt>
+[ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*\+0x[0-9a-f]+@plt>
#pass
#map: ifunc-1-x86.map
#...
-[ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*(\+0x170|\+0x190|\+0x210|)@plt>
+[ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*\+0x[0-9a-f]+@plt>
#pass
#target: x86_64-*-* i?86-*-*
#...
-[ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*(\+0x190|\+0x1a0|\+0x1b0|\+0x220|)@plt>
+[ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*\+0x[0-9a-f]+@plt>
#pass