radv: store the primitive topology hardware value in the pipeline
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Wed, 8 Jul 2020 07:36:00 +0000 (09:36 +0200)
committerMarge Bot <eric+marge@anholt.net>
Thu, 9 Jul 2020 06:31:39 +0000 (06:31 +0000)
Will help for upcoming changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5801>

src/amd/vulkan/radv_cmd_buffer.c
src/amd/vulkan/radv_pipeline.c

index df0191f28d628a1908efa0296f84d7f87b4a0d9d..fd8400e9b7e0b224a73d103a5038bdc8c20ff8c6 100644 (file)
@@ -1332,7 +1332,7 @@ radv_emit_line_stipple(struct radv_cmd_buffer *cmd_buffer)
        struct radv_pipeline *pipeline = cmd_buffer->state.pipeline;
        uint32_t auto_reset_cntl = 1;
 
-       if (pipeline->graphics.topology == VK_PRIMITIVE_TOPOLOGY_LINE_STRIP)
+       if (pipeline->graphics.topology == V_008958_DI_PT_LINESTRIP)
                auto_reset_cntl = 2;
 
        radeon_set_context_reg(cmd_buffer->cs, R_028A0C_PA_SC_LINE_STIPPLE,
index 098d26bb3b8974c9c5865979b7178baf6d0b9e08..52a882297dffae763a26f96119254e66323b3dca 100644 (file)
@@ -5063,7 +5063,7 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
        uint32_t gs_out;
        uint32_t prim = si_translate_prim(pCreateInfo->pInputAssemblyState->topology);
 
-       pipeline->graphics.topology = pCreateInfo->pInputAssemblyState->topology;
+       pipeline->graphics.topology = si_translate_prim(pCreateInfo->pInputAssemblyState->topology);
        pipeline->graphics.can_use_guardband = radv_prim_can_use_guardband(pCreateInfo->pInputAssemblyState->topology);
 
        if (radv_pipeline_has_gs(pipeline)) {