ARM: Handle accesses to the DACR.

diff --git a/src/arch/arm/miscregs.hh b/src/arch/arm/miscregs.hh
index f43b55271026d52c951c30dad6d3dac40d835652..6d8c3284528edcb5a748c5e16297b47debafbe73 100644 (file)
--- a/src/arch/arm/miscregs.hh
+++ b/src/arch/arm/miscregs.hh
@@ -108,6 +108,7 @@ namespace ArmISA
         MISCREG_MIDR,
         MISCREG_TTBR0,
         MISCREG_TTBR1,
+        MISCREG_DACR,
         MISCREG_CP15_UNIMP_START,
         MISCREG_CTR = MISCREG_CP15_UNIMP_START,
         MISCREG_TLBTR,
@@ -130,7 +131,6 @@ namespace ArmISA
         MISCREG_PAR,
         MISCREG_AIDR,
         MISCREG_ACTLR,
-        MISCREG_DACR,
         MISCREG_DFSR,
         MISCREG_IFSR,
         MISCREG_ADFSR,
@@ -198,11 +198,11 @@ namespace ArmISA
         "clidr", "ccsidr", "csselr",
         "icialluis", "iciallu", "icimvau",
         "bpimva", "bpiallis", "bpiall",
-        "midr", "ttbr0", "ttbr1", "ctr", "tlbtr", "tcmtr", "mpidr",
+        "midr", "ttbr0", "ttbr1", "dacr", "ctr", "tlbtr", "tcmtr", "mpidr",
         "id_pfr0", "id_pfr1", "id_dfr0", "id_afr0",
         "id_mmfr0", "id_mmfr1", "id_mmfr2", "id_mmfr3",
         "id_isar0", "id_isar1", "id_isar2", "id_isar3", "id_isar4", "id_isar5",
-        "par", "aidr", "actlr", "dacr",
+        "par", "aidr", "actlr",
         "dfsr", "ifsr", "adfsr", "aifsr", "dfar", "ifar",
         "dcimvac", "dcisw", "mccsw",
         "dccmvau",