binutils: NEWS: Announce new RISC-V vector crypto extensions
authorChristoph Müllner <christoph.muellner@vrull.eu>
Fri, 30 Jun 2023 21:30:58 +0000 (23:30 +0200)
committerJeff Law <jlaw@ventanamicro>
Sat, 1 Jul 2023 13:32:20 +0000 (07:32 -0600)
This commit adds the recently added support of the RISC-V vector crypto
extensions to the NEWS file.

binutils/ChangeLog:

* NEWS: Announce new RISC-V vector crypto extensions.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
binutils/NEWS

index 2e8d51d27738ec9a84e0a16fcf75395e68029486..834e648db6cdecfe96ec127cd956fa88908dcacc 100644 (file)
@@ -23,6 +23,8 @@
 * The RISC-V port now supports the following new standard extensions:
   - Zicond (conditional zero instructions)
   - Zfa (additional floating-point instructions)
+  - Zvbb, Zvbc, Zvkg, Zvkned, Zvknh[ab], Zvksed, Zvksh, Zvkn, Zvknc, Zvkng,
+    Zvks, Zvksc, Zvkg, Zvkt (vector crypto instructions)
 
 * The RISC-V port now supports the following vendor-defined extensions:
   - XVentanaCondOps